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MSP430FR6989: GPIO static current draw in LPM4

Part Number: MSP430FR6989

I am trying to measure the current draw of MSP430FR6989 in LPM4 on its development board. I measure the current draw from a Keithley SourceMeter.

If I don't unlock GPIOs (don't execute PM5CTL0 &= ~LOCKLPM5;), the current draw in LPM4 is quite close to the number claimed in the datasheet. For example:

MSP430FR6989 LPM4 current draw with GPIO locked
Supply Voltage 2.0 V 2.5 V 3.0 V
Current Draw 475 nA 490 nA 1.10 uA

However, if I unlock GPIOs, no matter what settings of GPIOs are, the current draw increases with supply voltage in a seemingly exponential way. For example:

MSP430FR6989 LPM4 current draw with GPIO unlocked
Supply Voltage 2.0 V 2.1 V 2.2 V 2.3 V 2.4 V 2.5 V 3.0 V
Current Draw 1.6 uA 3.5 uA 8 uA 15.5 uA 24 uA 37 uA 130 uA

I guess the reason might be with CMOS leakage on those GPIO pins but I am not sure of it.

Does anyone know the reason? What does clearing LOCKLPM5 actually take an effect in hardware? 

Thanks in advance. 

Jie Zhan

  • Per User Guide (SLAU367O) Table 2-5, "After a power cycle I/O pins are locked in high-impedance state with input Schmitt triggers disabled until LOCKLPM5 is cleared". As I understand it, that state allows them to float (like analog inputs) without constantly jiggling the CMOS and wasting power.

    What software are you using? If you release LOCKLPM5 without conditioning the pins (internal pullups, e.g.) you'll be back to jiggling the CMOS. 

    I haven't tried the voltage-ramping experiment, but I was seeing single-digit (2? 3?) uA with an FR6989 Launchpad and the TI LPM3 Example.

  • Thank you for your reply Bruce.

    I just realised today that it was a problem with my testing program. In the testing program, the MCU enters LPM just after clearing LOCKLPM5, like:

    PM5CTL0 &= ~LOCKLPM5;
    __bis_SR_register(LPM4_bits);

    so there is no time for those GPIO configurations to actually take effect. Therefore, as you said, those pins are left in the default high-impedance input state, and hence constantly jiggle the CMOS and waste power. 

    I added a short delay between the above two lines:

    PM5CTL0 &= ~LOCKLPM5;
    __delay_cycles(0xF);
    __bis_SR_register(LPM4_bits);

    and the current draw became stable and reasonable (about 0.5 ~ 2 uA) across various supply voltage now. 

    Thank you again! 

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