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  • Resolved

TM4C123 NMI unlock

Hello everyone, I have many questions about MCU pin muxing function. I’m now using the PF0 pin of TM4C123FH6PM, because this pin is NMI function, I want to unlock and use it as normal I/O port. The code:

#include <stdint.h>

#include <stdbool.h>

#include "inc/hw_ints.h"

#include "inc/hw_memmap.h"

#include "inc/hw_types.h"

#include "driverlib/gpio.h"

#include "driverlib/sysctl.h"

#include "driverlib/systick.h"

#include "driverlib/pin_map.h"

#include "inc/hw_gpio.h"

int

main(void)

{

      volatile unsigned long ulLoop;

    SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |

                             SYSCTL_XTAL_16MHZ); 

   /*

     HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;  

    HWREG(GPIO_PORTF_BASE + GPIO_O_CR)  = 0x01;      

   SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);     

   GPIODirModeSet(GPIO_PORTF_BASE, 0x01, GPIO_DIR_MODE_OUT);

   GPIOPadConfigSet(GPIO_PORTF_BASE, 0x01,GPIO_STRENGTH_2MA,            

                                         GPIO_PIN_TYPE_STD);

   HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;  

   HWREG(GPIO_PORTF_BASE + GPIO_O_CR)   = 0x00;

   HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = 0;         

*/

SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);                          

GPIOPadConfigSet(GPIO_PORTF_BASE, 0x02,GPIO_STRENGTH_2MA,            

                     GPIO_PIN_TYPE_STD);                            

GPIODirModeSet(GPIO_PORTF_BASE, 0x02, GPIO_DIR_MODE_OUT);         

         while(1)

    {                  

          GPIOPinWrite(GPIO_PORTF_BASE, 0x03, 0x03);

         for(ulLoop = 0; ulLoop< 200000; ulLoop++)

                 {}

           GPIOPinWrite(GPIO_PORTF_BASE, 0x03, 0x00);

           for(ulLoop = 0; ulLoop< 200000; ulLoop++)

             {}

      }

}

My questions is:

(1)    When I shield the uclocked code between  /*and */, the PF1 can output square wave signal. But when add the /**/ code to main.c, it didn’t work out. The PF0 and PF1 didn’t have output signal, and this code affect the PF1 function.

(2)I use the library about TivaWare and MDK software,

#define GPIO_LOCK_KEY      0x4C4F434B;

I don’t know where the problem is, is this wrong to unlock the NMI function?  I thank you very much for your answers. 

  • Note that your "working code" first calls, "SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);" - prior to any other Port_F access.  But - when you attempt "unlock" - 1st code listed:

    paul cai
    HWREG(GPIO_PORTF_BASE + GPIO_O_CR)  = 0x01;   

    Unlock should not be attempted w/out first enabling the effected Port - don't you agree?   I'm surprised that this premature access of PortF did not land you w/in Fault Handler.

    Further - your unlock is rather brutal "= 0x01;" - suggest an |= 0x01; so that only PF0 is recipient...

    W/in example code (multiple places) you should find "known good" code samples - detailing the unlock & subsequent repurpose of PF0.

    As always SW-DRL-UGxxxx - your MCU manual - and the many code examples provided by this vendor will speed & ease your learning...

    Hate to provide unpaid cook-book - but here is how our group "harvested" equally NMI burdened PD7:

          HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
          HWREG(GPIO_PORTD_BASE + GPIO_O_CR) |= 0x80;
          HWREG(GPIO_PORTD_BASE + GPIO_O_AFSEL) &= ~0x80;  
          HWREG(GPIO_PORTD_BASE + GPIO_O_DEN) |= 0x80;
          HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = 0;

    Above sequence "preps" PD7 for use as GPIO.  Direction Register clings to default - leave its set-up/modification as reader exercise... 

  • In reply to cb1_mobile:

     Thanks, cb1_mobile, I have solved this problem with your help.

  • In reply to cb1_mobile:

    Hello,

    I am trying to unlock PF0 and PF1 for CAN0Tx and CAN0Rx respectively. Could you please let me know where i can find some code to help me with it.

    Thank you

  • In reply to Agraj Jain:

    Hi,

        See, post link below. Code snippet sets PF0 as U1RTS. You just need to change the AFSEL line to set PF0 as CAN0RX. Refer to your device datasheet.

         UNLOCK NMI PIN

    -kel

     


    Do, click "This Resolved my issue", if any of my replies helps solve your problem. For Tiva ARM Forum, see links below.

    TM4C123 NMI unlock - To those who want to use PF0 and PD7, be reminded that these pins default as NMI ! ! !

    JTAG Communication Failures

    Blog: https://markelthinkslearnscreates.wordpress.com/

    Featured Blog Projects: TI CC2640R2F Eddystone BeaconBluetooth Low Energy Game ControllerBluetooth Low Energy Power Bank,  Secure Internet Of Things Humidifier

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  • In reply to cb1_mobile:

    Just a note of thanks to cb1_mobile for this post, his code for unlocking PD7 really saved my butt on a project this week.  Thanks!

  • Guru 47900 points

    In reply to Mark Bridges:

    And thanks to you too Mark - for that kindness.   Most would not take the time/effort to report their success - you did!

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