I am facing to the same problem than abrophy when running at 80MHz. My bootloader application sometimes returns a bad-CRC error - this happens very rarely but enough to puzzles me :-) In order to detect the error I have wrote a routine by doing successive writes from 0x9000(above the bootloader location) to 0x3AA8C (total 203404 bytes) that is:
Next I perform a 32bit-CRC, compare it with a 32bit-CRC generated by a PC application and check them if they are different. Here's the result when CRCs are not equal:
In this case content of address 0x27910 is 0x00007844 instead 0x00007A44.
The strange thing is I am using C3 revision of LM3S9B96 and this issue seems to be fixed in C revisions. Could you confirm this?
I see that this question is marked as answered, but I don't see any answer, or even any follow-up posts. Has something broken in the forum?
Edit: After adding my reply, the question is no longer marked as answered. I'm not given the option of deleting this reply, though. It definitely looks as if something odd is happening on the website.
Yes indeed, very strange... Further, I have received no email notification of slandrum's last post.
Is this on a reference board or on a custom board? If it is on a custom board were all of the workarounds for the flash errata followed in the board design.
Does this happen at lower system frequencies? I realize that the one errata related to speed was removed in C3, but it would still be a good data point.
Also you should be taking some care in writing these devices too many times or you could run into the flash endurance errata on this class of devices.
The errata for that revision is located here http://www.ti.com/lit/er/spmz538k/spmz538k.pdf.
Stellaris PaulIs this on a reference board or on a custom board? If it is on a custom board were all of the workarounds for the flash errata followed in the board design.
Yes, this is a custom board. I have checked the RevC3 errata you have attached and I found at chapter 4.5 there may be a risk of flash corruption at power on. it could be the issue because sometimes -not always- I get a bad CRC at power on using the flash test application explained at the first post. When it fails I retry the test (without performing a hw reset) and it often fails again. Then I need to do multiple retries - sometimes 10/20 times - until getting a correct CRC.
Maybe the flash controller is touched after an invalid power on sequence and then it remains affected during some time - even if a software reset is performed -. In this regard I will suggest my client to check this sequence.
Stellaris PaulDoes this happen at lower system frequencies? I realize that the one errata related to speed was removed in C3, but it would still be a good data point.
There is no problem at 50MHz.
Stellaris PaulAlso you should be taking some care in writing these devices too many times or you could run into the flash endurance errata on this class of devices.
Yes, I already noticed about this. Although I have performed in some boards more than 500 WR cycles on a flash sector and -till now - their flash seem to be okay.
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