When I wanted to change the Sysclk to 3MHz, I used
SysCtlClockSet(SYSCTL_SYSDIV_2 // 2 DIV | SYSCTL_USE_OSC // Use OSC | SYSCTL_OSC_MAIN // | SYSCTL_XTAL_6MHZ); // external osc
and my LM3S811 always works right, indicating that the external 6MHz-osc is OK.
but, when I wanna change the Sysclk to 200MHz by PLL, I used
SysCtlLDOSet(SYSCTL_LDO_2_75V); SysCtlDelay(3000); SysCtlClockSet( SYSCTL_SYSDIV_1 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_6MHZ ); SysCtlDelay(3000);
delay before stable output.
Sysclk will be used as PWM clk, and I set the PWM period 8 and theorotically the freq of PWM should be approximately 25 MHz.
However, the PWM is 1.5MHz indeed , indicating that the actual clk is 12MHz. According to the datasheet, the clk is internal 12MHz-osc.
Could anybody explain it to me?
I'm pretty sure that setting the system clock to 200Mhz is illegal, and instead you will be setting it to some other value. The fastest you can run the LM3S811 at is 50Mhz, and that's probably what you will actually run it at if you try to use a PLL divider of 1, but be aware that a PLL divider of 1 is illegal for this part.
Thanks. I've already tried running the LM3S811 at a freq of 50MHz by setting the divider of 4. As a matter of fact, any divider below 4, namely divider of 1, 2, or 3, is all illegal, and the LM3S811 will not be run at a PLL freq. Instead, the internal osc freq will be applied.
huangzhechen any divider below 4 - namely 1, 2, 3 are all illegal
Don't think so - have not run S811 device in awhile but pretty sure that divide by 2 (to 25MHZ) is legal and does work. May be issue with your xtal, xtal caps - don't believe you can (or should) generalize an apparent one board (one device) issue.
As the output of PLL is 200MHz, the divide by 2 is to 100MHz not to 25Mhz. I have already tried a divider by 1(to 200MHz) and it is illegal, so the final sysclk is 12Mhz--the freq of internal osc. Thanks all the same.
At the beginning I didn't realize that S811 cannot run at a PLL freq higher than 50Mhz, so I was really puzzled why I fail to initialize the PLL with divide 1.
You are certainly correct - 2 stinkers from this reporter (that we know of) in one day. Was locked in on 50MHz max of 3S811 - thus your choice of word, "illegal" was most appropriate and certainly proper. May have to take up, "texting while driving" rather than "forum read/write while driving/flying" - in light of today's horrors...