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Hi Bill,

Unless you are imposing address alignment constraints on several sections of your code, I think the IAR compiler prefers using the lower addresses of flash before it starts using higher addresses. I would not expect the last page to be used for code unless the program is very large.

If you want to make sure that the last page is never used for code, one thing you could try is editing the size and boundaries of the FLASH region in the <projectname>.icf file. We currently use the options in that file in some of our examples to avoid linking code to the first page of flash, so that these examples won't interfere with a flash-based bootloader placed in that location. To verify that this is working, you can take a look at the map file generated during the compile/link process to see where all of your code and variables were placed in the memory map.

Regards,
Christian

Hi Christian,

I got an answer from IAR and you are correct to edit the <project_name>.icf file.

They make it pretty easy by clicking on: Projects -> Options -> Linker -> Config -> Project_Name.ICF file.

Edit Memory regions: ROM END to 0x3EFFF (really is 0x3FFFF) so that the last 4 K page will not be used for code.
This is where the non-volatile memory data will be placed.

Code is loaded from 0 on up so placing this region at the end makes the most sense to me.

I am using SoftEEPROM which seems to use a technique that moves the configuration data around each time you write it presumably to get past the low endurance of the flash.  It would be nice to have some EEPROM in the chip.

Thanks for your help.

Bill

@Bill-

Thank you for this detail - surely helps we IAR users and provides a "model" (and/or club - "but IAR does that!") for competing IDE suppliers.  Between TI Christian's guidance - and your kind/helpful follow-post now - many will benefit.