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I can't read most of your post, it comes out badly mangled in my browser, starting at where you've included the code section.

Your computer will probably send a lot of packets over the ethernet other than what you are explicitly asking it to.  You may be seeing these other packets as your computer is trying to discover details about the network and devices connected to it.  I would monitor the traffic with WireShark or some similar tool to see what your computer is actually sending out as opposed to what you are asking it to send out.

Sorry,
I tryed to post some code, setting different color and font in the online editor, but something went wrong.

First, thank you for your quick answer.
But I am quite sure no other packet is running out of that particular PC interface.
That interface is not seen by the operating system, but instead a special Real Time driver, running below the OS is sending the packets.
So no ARP, BROWSER, NBLOOKUP and other type of packers are sent there without my knowledge.
We already checked this with WireShark.

Additionally, I am quite sure that the truncated packets is one of mine, since the initial portion of the packer that is avaliable, looks like one of my packets.
Actually, making all packets of same size, is already a test to seek for this problem.
Initially the packets were of variable size, normally much shorter that 1300 bytes, but still some of them looked like shorter than they should.
So we decided to make all packets fixed size and added this specific test to check for the validity of the packet.

We already tryed to tweak some code to find the problem, like disabling duplex mode, like making all packet's size equal as I mentioned, and other changes that did not change the behavior.

The only thing that seemed to "solve" the problem is that if we place a switch in between (for examplet to connect wireshark too), everyting works fine.
This seems a good indication of where the problem might be, but we coudn't get hold of it.
The switch may introduce three kind of changes, I am aware of:
- Change in timing since the switch receives the complete message before retransmit it
- Change in quality of signal, since it is regenerated
- Change in crossing, since a stringt point-to-point cable causes the two ethernet endpoints to agree on wich are the Tx and Rx  pair.

To exclude the last possibility, we also tryed a cross cable without changes.
To eclude the first possibility the traffic is actually half duplex. The PC send a packet, and after reception, the board sends a packet back.
No other traffic runs on the cable until the next time slot which is after 1mS. So all FIFOs should be empty when a new cycle begins.

I am starting to consider the second case, but I don't know how to check.
I expect that If a garbled packet arrives at the controller, it is silently discarded, or at least some error bit is set (which I don't see).
Is this the normal behavior?

Thanks for any hint.
Regards.

For completeness I try again to put the relevant code here:

The interrupt routine:

unsigned long status;

// Read status and clear pending interrupts
status = EthernetIntStatus(ETH_BASE, false);
EthernetIntClear(e->ulPeripheral, status);

// Manage packet reception
if(status & ETH_INT_RX)
{
  // Retrieve the packet
  long len = EthernetPacketGetNonBlocking(e->ulPeripheral, (unsigned char *)&p->header, (sizeof(TEthMsg) - sizeof(long)));
  if(len != 1300)
  Error++;
}
else
 ...

The initialization code:

SysCtlPeripheralEnable(SYSCTL_PERIPH_ETH);       // Enable peripheral
SysCtlPeripheralReset(SYSCTL_PERIPH_ETH);        // Reset to a known status
EthernetInitExpClk(ETH_BASE, SysCtlClockGet());
EthernetConfigSet(ETH_BASE, (ETH_CFG_TX_DPLXEN | ETH_CFG_TX_CRCEN | ETH_CFG_TX_PADEN));
EthernetIntDisable(ETH_BASE, (ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER | ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));
ulTemp = EthernetIntStatus(ETH_BASE, false);
EthernetIntClear(ETH_BASE, ulTemp);
EthernetMACAddrSet(ETH_BASE, e->our_mac);
EthernetIntEnable(ETH_BASE, (ETH_INT_RXER | ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));
EthernetEnable(ETH_BASE);
IntEnable(INT_ETH);                              // Enable peripheral interrupt