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TI Home » TI E2E Community » Support Forums » Microcontrollers » Stellaris® ARM® Microcontrollers » Stellaris® ARM® LM3S Microcontrollers Forum » JTAG IMPLEMENTATION WITH SPI
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    JTAG IMPLEMENTATION WITH SPI

    This question is not answered
    mah kon
    Posted by mah kon
    on Jun 20 2012 23:55 PM
    Intellectual465 points

    Hi all,

    I am using LM3S9B96 microcontroller for my project. In My project we implemented JTAG interface with GPIO's and its working fine.  Using this jtag i am able to

    transfer 1MB of data in 1 min to ML605. To improve the data rate we are planning to implement JTAG interface with SPI.  Is it possible to implement JTAG with

    SPI?. If so how? Please provide me code if any body implemented.

    Thanks & Regards,

    Mah Kon 

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    • BrandonAzbell
      Posted by BrandonAzbell
      on Jun 21 2012 00:10 AM
      Guru54850 points

      I don't have any implementation of this, but do have questions you regarding this concept.

      In your implementation of a JTAG interface using GPIO, how many signals are you controlling?  I presume it is at least 3, ie. TCK, TMS and TDI.  Perhaps you also need TDO for programming the FPGA.  As a master device on the JTAG interface and assuming my assertion is correct regarding the above signals, all 3 signals are outputs of the master device.

      A SPI interface generally has 4 signals, CLK, DI, DO and sometimes CS. I could see a match between TCK and CLK.  I could see a match between DO and TDI.  But what SPI signal would drive TMS?  TMS is an important signal as it is used with TCLK to run the JTAG state machine.

      Currently, I don't see a path to implement this UNLESS you find a device with multiple data output lanes.

      Brandon

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    • cb1_mobile
      Posted by cb1_mobile
      on Jun 21 2012 08:46 AM
      Guru22030 points

      Pardon - as both speed and signal number are key - should not SWD/SWO be at least a consideration?

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    • BrandonAzbell
      Posted by BrandonAzbell
      on Jun 21 2012 08:55 AM
      Guru54850 points

      cb1_mobile

      Pardon - as both speed and signal number are key - should not SWD/SWO be at least a consideration?

       
      I made the assumption, perhaps that should teach me something, that the intention of this was to program the FPGA via JTAG by the microcontroller.  I don't spend really any time looking through FPGA documentation, but I'm guessing that SWD/SWO is not an option for the programming interface, rather only JTAG or the exteranl serial flash device for the bitstream.

      Brandon

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    • cb1_mobile
      Posted by cb1_mobile
      on Jun 21 2012 09:04 AM
      Guru22030 points

      @Brandon-  Agree with you - especially your point re: TMS(how?).   AS SWD is both faster, fewer signaled than JTAG - thought it merited mention...

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