I am trying to interface a Microcip MCP3553 to a LM3S5749. In this case the MISO pin is used to indicate the ready state prior to having the data clocked out.
Is it possible to sense this pin as an input port when the SPI mode is set? Or, do I need to 'close' the SPI mode to sample the pin and then enable SPI mode to get the data?
David PfaltzgraffIs it possible to sense this pin as an input port when the SPI mode is set?
I don't believe so - recall that SPI data is both written and read only when the SPI clock "ticks."
You could switch the SPI port on/off as you suggest. I'd prefer to use a separate GPIO - dedicated to reading your MCP3553 status. This pin would thus "signal" your SPI to start its process...
In this particular case, I need to hold the CLK line high while I monitor the MISO pin. When I disable the SSI module, do I need to set up the DIR and DATA registers again?
My presumption was that when I set the DIR and DATA registers, the values would remian there and would be 'in effect' when the SSI was disabled. But, this doesn't appear to be the case. (Still investigating.)
Just for background, I am trying to avoid adding the input to another pin since my soldering skills don'r go wuite that small! If necessary, I'll do it, but...
The SPI module - with all of its operating modes - is significantly challenging by itself - your "presumptions" (while clever) may be too much to ask. (and really must be confirmed)
We always bring each/every MCU's GPIO pin out to an edge connector on our custom boards. (avoids your soldering dilemma) The new launchpad is ~14 USD - perhaps that's a better choice for your experiment.
You add new, "facts in evidence" with your restriction on CLK line being high during MISO monitoring. Shouldn't you determine which of the multiple Stellaris SSI "configurations" best suit your external SSI chip - and start your design effort from that? IIRC "some" configurations do leave CLK high - but these may not prove proper for things such as, "clock edges" and number of bits required.
You really do need to review the slave SSI chip's data requirements - and then choose the most appropriate Stellaris SSI configuration. (and this may not result in CLK being "high" during SSI "idle.") Should this be the case - appears that you have no choice but to exit SSI mode - configure SSI_CLK to be normal GPIO - and set it as output with level high. Then configure SSI_MISO also as normal GPIO - as an input - and either loop on this or trigger an interrupt when your slave drives high.
Once you detect the slave's "ready" you must configure your SSI Port for the most appropriate SSI mode. Not the most efficient means but should meet your objective.
You may want to search for a more conventional SSI slave - one without these strange signal (non SPI normal/customary) demands...
You make too many presumptions. For one, the MCP3553 was chosen prior to choosing the LM3S processor family. The second is that this is on a custom board - already laid out. Finally, as far as I can tell, the Lauchpad doesn't support the LM3S family. As far as I can tell TI is abandoning the LM3S family even though there is no equivalent in the LM4F family. (See other posts!)
To make my life simple, if the SSI Tx (MOSI) is unused and the SSI pins are configured with:
GPIOPinTypeSSI(GPIO_PORTE_BASE, (GPIO_PIN_0 | GPIO_PIN_2);
is GPIO_PIN_3 available for reguglar GPIO use? In this case a blob of solder across pins 95 and 96 will do the job for me.
You have the board - should be quick/easy for you to code and observe... (I've no experience w/your part - or partially liberating an SSI pin)
btw - your post is not the friendliest - the advice I provided is sound and may help others - as well.
To answer the primary question, yes you can use the Tx (MOSI) pin as a separate I/I when it is not allocated to the SSI function.
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