I need to run the MDL-S2E with a maximum of 100mA current and maintain the 1.5 Mbps UART connection. The datasheet shows 200mA max current at 50MHz.
Is it possible to run at a lower frequency and achieve the 100mA target? If so, what are the tradeoffs?
Per my understanding, it may not be possible to achieve the 100mA target for the entire S2E board. The Ethernet + PHY module runs from a clock that is separate from the system clock. So, lowering system clock (say, from 50 MHz to 8 MHz) will only reduce the overall power consumed by peripherals that are running on the system clock. To provide you an estimate, the Ethernet + PHY draws about 100 mA. No matter, how much the system clock is slowed down, the overall power consumption of the board won't probably drop below 100mA.
Warm Regards,Ashish Ahuja
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