UART RX , TX interrupts

Hi All,

After looking up at the forum for UART RX and TX interrupts, What are the possible cases for RX and TX interrupts for UARTs ? Datasheet doesn't explain it clearly too.

We're using LM3S6911 in our project and We need to use RS485.  RS485 drivers has got WE and RE pins these pins should be controlled for proper operations. A interrupt is needed when transmit holding register sends a byte. This interrupt will be used to enable reception (RE pin).

On the otherhand for reception, FIFO is a good choice not to waste CPU time but in this case the staling possible if not enough characters to trigger at configured level. Is RT (receive timeout)  configurable ?

 

Regards,

Mehmet

  • Mehmet,

     

    As specified in the Data sheet, the UART interrupt sources are:

       - Overrun Error

       - Break Error

       - Parity Error

       - Framing Error

       - Receive Timeout

       - Tx (configurable)

       - Rx (configurable)

    The different error conditions are described in the UART Data Register (UARTDR).

    The receive timeout interrupt only occurs when the Rx FIFO is not empty and 32 bit times have passed since the last bit was received. So no, it is not a configurable amount of time.

     

    -Alex

  • In reply to TI Alex:

    Hi Alex,

    There are many discussions about this subject on the forum. There are some points not clear for RX and TX interrupts.

    RX,

          When will an interrupt trigger in FIFO enabled and FIFO not enabled? It is clear for FIFO enabled case interrupt will fire when configured FIFO level is reached. If not enough characters received, The receive timout comes into scene and fires. As noted "32 bit times have passed" What this actually mean ? Is it a 32 bit timer ? What clock does it use ? Is it number of rs232 bit time ?

     

    TX

         When an interrupts is triggered for FIFO enabled and not enabled cases ? My understanding is interrupts cannot be used when FIFO isn't enabled. Please confirm this. If FIFO is enabled  the minumum value is 1/8 interrupt. There will be 2 characters in the fifo when interrupt fires. Please confirm this.

     

    Regards,

    Mehmet

     

  • In reply to mehmet ekici:

    Mehmet,

     

    - If FIFOs are not enabled and you turn on the Rx interrupt, it will interrupt when you receive one character.

    - If FIFOs are not enabled and you turn on the Tx interrupt, it will interrupt once the end of transmit is detected.

    - If FIFOs are enabled and you turn on the Rx interrupt, it will interrupt when you meet the condition set in the UARTIFLS.

    - If FIFOs are enabled and you turn on the Tx interrupt, it will interrupt once you meet the condition set in the UARTIFLS. If your part has the EOT bit in the UARTCTL register, you can set this bit to have the interrupt happen when the end of transmit (of all the data, i.e. FIFO will be empty when this gets set) is detected, instead of using the condition in the UARTIFLS.

    - 32-bit time means 32 UART bit times. For example: at 115,200 bits per sec, the bit time is ~8.6 microseconds, so 32 bit times is ~278 microseconds.

    - For the Tx question, the interrupt will fire when there is less or equal to 1/8 spots full in the Tx FIFO. The FIFOs are 16 spots deep, which implies that the interrupt will occur when there is 2 items or less.

     

    -Alex

     

     

  • In reply to TI Alex:

    Hi Alex,

    I think you are contradicting yourself, first you say:

    TI Alex

    - If FIFOs are enabled and you turn on the Tx interrupt, it will interrupt once the end of transmit (of all the data, i.e. FIFO will be empty when this gets set) is detected or you meet the condition set in the UARTIFLS.

     

     

    And then you say:

    TI Alex

    - For the Tx question, the interrupt will fire when there is less or equal to 1/8 spots full in the Tx FIFO. The FIFOs are 16 spots deep, which implies that the interrupt will occur when there is 2 items or less.

     

    Only the newer parts(LM3S9BXX and other I guess), have the EOT bit in the UARTCTL register, and will generate an interrupt on EOT(only, the setting of TXIFLSEL is ignored), when it is set. The LM3S6911, does not have the EOT bit in the UARTCTL register.

  • In reply to marc_rir:

    You're right, I should have been clearer.


    The EOT bit will determine what source interrupts the Tx register (if EOT is 1 the Tx interrupt will occur the the Tx FIFO is empty, if EOT is 0 the Tx interrupt will occur based on the FIFO level). But since that bit is not available on the LM3S6911, that's irrelevant for you.


    So for the LM3S6911, you can only have a Tx interrupt when the condition in the UARTIFLS is met. Although, it is still true if the FIFOs are disabled, the Tx interrupt will occur when then transmit is completed.

     

    Note: I edited my previous post to clarify this.



    -Alex

  • In reply to TI Alex:

    Hi,

    I'am trying a trick for RS232 EOT interrupt issue. I set up a timer using the following code to check if trasmission of the last btye completed.

    We are using LM3S6911-IQC50A2X , 8Mhz crystal. I copy the interesting parts from the code (We take the code from ser2enet).

     

        //
        // If running on Rev A2 silicon, turn the LDO voltage up to 2.75V.  This is
        // a workaround to allow the PLL to operate reliably.
        //
        if(REVISION_IS_A2)
        {
            SysCtlLDOSet(SYSCTL_LDO_2_75V);
        }

        //
        // Set the processor to run at 50 MHz, allowing UART operation at up to
        // 3.125 MHz.
        //
        SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN |
                       SYSCTL_XTAL_8MHZ);

        ulLoop = SysCtlClockGet() ;
        SysTickPeriodSet(ulLoop/ SYSTICKHZ);
        SysTickEnable();
        SysTickIntEnable();

     

        // Configure the two 32-bit periodic timers.
        //
        SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER1);   
        TimerConfigure(TIMER1_BASE, TIMER_CFG_32_BIT_PER);
        ulLoop = SysCtlClockGet();
        TimerLoadSet(TIMER1_BASE, TIMER_A, ulLoop/1000);
       
        //
        // Setup the interrupts for the timer timeouts.
        //
        IntEnable(INT_TIMER1A);
        TimerIntEnable(TIMER1_BASE, TIMER_TIMA_TIMEOUT);
        TimerEnable(TIMER1_BASE, TIMER_A);

     

    The following is the timer interrupt

    void
    Timer1IntHandler(void)
    {

     

    //    if (!UARTBusy(UART2_BASE))
    //    {
    //      // Enable RX and Disable TX of RS485 hardware
    //      GPIOPinWrite(PIN_RS485_RXEN_PORT, PIN_RS485_RXEN_PIN, RS485_RX_ENABLE);
    //      GPIOPinWrite(PIN_RS485_TXEN_PORT, PIN_RS485_TXEN_PIN, RS485_TX_DISABLE);
    //    }   
    //    if (!UARTBusy(UART1_BASE))
    //    {
    //      GPIOPinWrite(PIN_U1RTS_PORT, PIN_U1RTS_PIN, PIN_U1RTS_PIN);
    //    }
    //  This code commented to test timer's sanity  


         //
        // Clear the timer interrupt.
        //
        TimerIntClear(TIMER1_BASE, TIMER_TIMA_TIMEOUT);
       
       
        if (g_bFirmwareUpdate)
        {
          GPIOPinWrite(PIN_RS485_TXEN_PORT, PIN_RS485_TXEN_PIN, RS485_TX_ENABLE);           
         
           g_bFirmwareUpdate = false;
        }
        else
        {
          GPIOPinWrite(PIN_RS485_TXEN_PORT, PIN_RS485_TXEN_PIN, 0);           
     
           g_bFirmwareUpdate = true;   
        }
       
    }

     

    What I see on the pin for the clock is a signal of 8 seconds period.
    Would you please tell us what might be the problem and why the timer doesnot work correctly ?

     

  • In reply to mehmet ekici:

    Have you tried running this in a dubugger?

     

    I bet that will help you find your answer.

     

    Other than that, I can not debug code with special defines and not specific functions. If you want, you can post your entire program as an attachment and I'll review it.

     

     

    -Alex

  • In reply to TI Alex:

    There's another trick for that, you don't need a timer.

     

    Search for 'RS485' and the like, you'll find your answer.

     

    Although, the EOT interrupt is a nice feature...

  • In reply to marc_rir:

    Marc,

    I had searched and asked TI. If you know anyway easier, I 'd be pleased to read it.

     

    Mehmet

     

  • In reply to TI Alex:

    I am using a LM3S2793, it has an EOT bit in the UARTCTL register. I am interested in knowing when transmission is complete. Can this bit be changed during a transmission? I would like to fill the FIFOs until there is not enough data to fill the FIFO at the end of transmission.

    If the FIFOs can not be used since I require an end of transmission signal what is the latency between TXRIS interrupt and the last bit of the serial character being transmitted?

    Thanks