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TI Home » TI E2E Community » Support Forums » Microcontrollers » Stellaris® ARM® Microcontrollers » Stellaris® ARM® LM3S Microcontrollers Forum » All Tags » FIFO
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Stellaris® ARM® Microcontrollers

Welcome to the Stellaris® ARM® Microcontrollers Section of the TI E2E Support Community. Ask questions, share knowledge, explore ideas, and help solve problems with fellow engineers. To post a question, click on the forum tab then "New Post".

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FIFO
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Related Posts
  • Forum Post: Re: Solving UART receive FIFO overflowed!

    Andy Neil Andy Neil
    nhanndt message sent by modem contain more than 16 chacracters. So the UART receive FIFO will be overflowed It is not the purpose of the UART FIFO to store an entire message! A FIFO in a UART reduces the overhead by not requiring an interrupt service on every single character - but it is still...
    on May 17, 2010
  • Forum Post: uDMA Problem with LM3s1625

    Locher Locher
    Hello everybody, I'm trying to realise a memory - based uDMA transfer from the ADC_Squence_0 FIFO Register to an data array. The Problem is that as soon as I'm trying to read from the FIFO address, the udma cancel with an Error. If I change the sourceAdress of the DMA tranfer to a global...
    on May 15, 2010
  • Forum Post: Re: Solving UART receive FIFO overflowed!

    Andy Neil Andy Neil
    nhanndt The generating rate of the GSM modem is 115200 bps So think about it: how long does each character take to transmit...? nhanndt I don't understand what parameter 1/8, 1/4, 1/2, 3/4 or 7/8 is "1/8" is one-eighth (ie 12.5%); this means that the interrupt fires when the FIFO...
    on May 18, 2010
  • Forum Post: Re: Solving UART receive FIFO overflowed!

    Andy Neil Andy Neil
    nhanndt Can i extend the capacity of the FIFOs? No - they are a "hard" part of the Stellaris microcontroller silicon. But you really shouldn't need to - even an 8051 (an 8-bit pocessor with no FIFOs) should be able to cope with controlling a modem! The key is to use a software buffer...
    on May 24, 2010
  • Forum Post: Re: UART Receive Timeout

    Andy Neil Andy Neil
    urs I need to produce an event for the operating system after a timeout What, exactly, is this event supposed to indicate? I suspect that this really needs to be at a "higher" level than the direct UART interface - so you should really be looking at implementing it with a timer...?
    on Jun 15, 2010
  • Forum Post: UART Receive Timeout

    urs urs
    Hi all I am using the Cortex-M3 LM3S8962 and I would like to get the UART over the Stellaris Peripheral Driver Library working properly (for now I am not using DMA). I am able to send and receive data without any problems, but I was wondering how do you manage the interrupts. There is a very useful...
    on Jun 15, 2010
  • Forum Post: CAN Controller setting for a transparent application

    Maurizio Ferraris Maurizio Ferraris
    Hi all, I have an application that is a bridge bethween Ethernet and CAN. I am using LM3S8970 for this purpose, but the question may be more general. I need to get all messages from a CAN bus without filtering. Is it enough to set: MsgObj.ulMsgID = 0; MsgObj.ulMsgIDMask = 0; // Mask off all...
    on Sep 20, 2010
  • Forum Post: SSI FIFO clear in slave mode

    Asaf Asaf
    Hi, I'm working with LM3S3739's SSI1 as slave. Data is transmitted and received interrupt driven on Tx/Rx FIFO half full alerts. I notice that every transmission I start does not start with the data I wanted to transmit, which affects also my end of transmission that ends earlier than I expect...
    on Nov 1, 2010
  • Forum Post: lm3s9b96 MISO writte in FIFO

    Perhirin Steven Perhirin Steven
    Hi, How does the uController know when write the first bit in the FIFO? Does the first bit correspond to the value of MISO when edge of SSIOClk goes from 0 to 1? In this exemple, FIFO is it 0111 or 0110? Thank you for taking time. Steven
    on Nov 30, 2010
  • Forum Post: Zero length packet sending

    Motor Motor
    My questions are about USB module. (FIFO lengtht is 8 byte) 1) If FIFO is empty; Following command sends 8 byte data. (Is it true?) USB0_CSRL0_R |= USB0_CSRL0_TXRDY; ---------------------- 2) If FIFO is empty; Following command sends zero byte data. (Is it true?) USB0_CSRL0_R |= USB0_CSRL0_TXRDY...
    on Jan 23, 2011
  • Forum Post: Re: Not Receiving EPI uDMA Interrupt

    Darrel Kanagy Darrel Kanagy
    I have been able to resolve this issue. When using the NBRFIFO and uDMA to move data directly from a peripheral to RAM, the number of elements being transferred by the uDMA must be a multiple of the trigger level of the NBRFIFO. In my code I am setting the NBRFIFO for a trigger level of 8 elements...
    on May 12, 2011
  • Forum Post: How to know a trigger of USB interrupt

    morizzo morizzo
    Hello everybody, I would like to understand how to know a trigger of USB interrupt under the following case: * Stellaris is a USB device, not a host. * Firmware setups a packet in TX fifo for expecting IN transaction from the USB host but not issued yet. * Firmware needs to abort/cancel...
    on May 31, 2011
  • Forum Post: Re: "uartstdio.h" user manual.

    Iman Prayudi Iman Prayudi
    thanks for the response, Andy. i thought i was the only one who couldn't find the user manual. haha.. i was wondering about how to 'UART_BUFFERED' feature in 'uartstdio.h' code. because my LM3s608 microcontroller has to handle 20*8bit incoming UART data, while the RX FIFO...
    on Jun 17, 2011
  • Forum Post: Re: "uartstdio.h" user manual.

    Iman Prayudi Iman Prayudi
    dear Andy, i've tried to follow your advice. i found 'UART Standard IO Module' manual in DK-LM3S828 Firmware Development Package User's Guide then, i made my own code as follows: -------------------------------------------------------------------------- int main(void) ...
    on Jun 20, 2011
  • Forum Post: "uartstdio.h" user manual.

    Iman Prayudi Iman Prayudi
    hi, all... does anyone have a user manual for "uartstdio.h" ? i found this file at "StellarisWare\utils\" directory. but i didn't find its user manual. thanks
    on Jun 16, 2011
  • Forum Post: Buffer, delay with LM3s9b96

    Perhirin Steven Perhirin Steven
    Hi, I'm currently using SPI data transmission between a LM3s9b96 and a CAN. Because there is about 10km distance between both device, there is a delay for receive the data. I found the way to get this delay. The context have no really matter. What I would like to know is that: Is there any...
    on Sep 2, 2011
  • Forum Post: Re: Buffer, delay with LM3s9b96

    Perhirin Steven Perhirin Steven
    Hi, Could I use FIFO of LM3S9B96 like this explain on this application : http://www.ti.com/lit/an/scaa046/scaa046.pdf : Programmable-Depth Shift Register or Programmable Flag Operation for Data Delays. Thank you for your time Best Regards
    on Sep 5, 2011
  • Forum Post: Re: Lm3s9b96 FIFO

    Perhirin Steven Perhirin Steven
    Unfortunatly, I'm not referring any FIFO in the LM3S9B96. If I can use one of it, it's will be enough. At this stage I'm using SSI FIFO for etablish a communication between another station, so this FIFO arn't not available. Could you please advice me in the choose of FIFO in the LM3S9B96...
    on Sep 8, 2011
  • Forum Post: Lm3s9b96 FIFO

    Perhirin Steven Perhirin Steven
    Hi, Could I use FIFO of LM3S9B96 like this explain on this application : http://www.ti.com/lit/an/scaa046/scaa046.pdf : Programmable-Depth Shift Register or Programmable Flag Operation for Data Delays. Thank you for your time Best Regards
    on Sep 7, 2011
  • Forum Post: Unable to decifer UART

    Diana Escobar-Pazo Diana Escobar-Pazo
    For some reason, I am unable to get UART to work on the Stellaris Dev Board (LM3S1968). At some point yesterday, it was TXing data but not receiving... now, it's doing none. Can someone please look at my code and make suggestions as to what I am doing wrong? BTW: This is for my Senior Design project...
    on Jun 30, 2011
  • Forum Post: Stellaris Tech Support

    -mark -mark
    Is there a way to get timely tech support for the Stellaris devices? Sorry, but this e2e support community seems hit or miss. There is much uncertainty regarding when or if you will receive a satisfactory answer. I've called TI tech support and am still awaiting an answer. Does anyone know...
    on Nov 4, 2011
  • Forum Post: Re: UART2 Message length on LM3S2965

    Dave Wilson Dave Wilson
    The truncation of your " hello,world12345678!" string is easy to explain but the missing "01" in the earlier case is slightly trickier. Considering the easy case first, the main problem is that you are failing to take into account that the UART FIFO is only 16 characters long....
    on Nov 7, 2011
  • Forum Post: Using EPI to implement a VMEbus interface

    Pasquale De Sando Pasquale De Sando
    Could I use the EPI interface of a cortex-M3 device, like the LM3S9B92, to implement a VME interface ? The VME interface is composed by the following signals: DATA BUS (16 bit) ADD BUS (6 bit) R\W Function selection bits (2 bit) ACK BYTE SEL (2 bit) RESET 8MHz clock ...
    on Nov 7, 2011
  • Forum Post: Re: Error in LM3S1B21 docs?

    Stellaris Miles Stellaris Miles
    Bob, Sorry for the delay. As I understand it that bit of doc is inherited from ARM. We chased it down to the source and confirmed that the docs are incorrect. As you guessed, for the RX they should all read "half full or more" and for the TX they should all read "half empty or less"...
    on Nov 16, 2011
  • Forum Post: Re: LM3s9B96 Transmit UART interrupt

    omprakash cn omprakash cn
    Hi David, In u-boot uart receive code:FIFO ENABLED,TXE,RXE,UARTEN. I'm facing problem in receiving more than 16 bytes of data.(once 16 bytes are received,STAT_RXFifoEmpty=1.All the remaining bytes will not be received) RXIFLSEL = 0x2 by default. I have tried with RXIFLSEL= all the values...
    on Feb 20, 2012
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