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SSI DMA Transfer Timed Out Complete Question

Dennis Nguyen
Expert 1690 points

Hi,

I was able to get SSI Slave DMA working to receive periodic (50ms) fixed size packets in perfect conditions. My question is somce time my slave Tiva and the SSI master is out of sync. From the Tiva datasheet, the only way for the DMA transfer complete is transfer data size? Is there a way to get DMA transfer complete when SSI Rx FIFO is timed out?

In my case, when slave SSI Tiva received a partial packet it wait until the next packet to fill the data buffer until the transfer size is satisfied. I am wondering if I have another option with Rx FIFO timed out

Thanks,

Dennis

  • 0
    TI__Guru**** 244380 points

    Hello Dennis

    You interpreted the data correctly. The SSI slave will send out data only when the data size is completed. The only way to make SSI DMA complete is to flush the data out of the FIFO by CPU and re-init of the uDMA.

    Do note that uDMA does not know anything about the packet. It just gets a transfer request signal and moves the data from one place to another. So any error recovery has to be a CPU overhead

    Regards

    Amit