This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TIVA TM4C123GH6PM Redirect the System Clock on a GPIO.

Is there a way to redirect the clock signal to an output ?

Thank you for your feedback

  • Hi,

    Nope in tm4c123. You can verify its setting indirectly with UART communication or PWM generation.

    Why do you need that? Generally it is not recommended, since EMC problems - your product can fail actual standards.

    Petrei

  • Petrei,

    I read datasheet, I have not found anything about it except use a GPIO PWM mode.

    my goal is to monitor the clock signal to the oscilloscope to detect precisely when the microcontroller goes into low-power modes (sleep, deep-sleep or hibernate).
    This feature already exists on other concurentes device to IT

  • Hello All,

    Confirming Petrei's post as well. Just a suggestion is instead of using a PWM a timer would be a simpler option.

    Regards

    Amit

  • Hello rrom,

    Hibernate can be precisely be seen by using the HIB_N signal. For Sleep and Deep Sleep mode the LDO Voltage Scaling may be used, but it would be as precise as GPIO toggle/PWM/Timer Toggle.

    Regards

    Amit

  • Amit
    Yes you are right about the HIB pin. I'll try.
    Nevertheless, I will use the PWM mode with the system clock divided by 2.

    Thank All

  • rrom said:
    will use the PWM mode with the system clock divided by 2.

    System Clock/2 may be too fast for your subsequent measurement.  Check your device - but iirc there must be adequate time for any timer pin to register a high-speed input signal. 

    [edit] For both input count and edge detection: "maximum input frequency is 1/4 of the system frequency."  (this from our MCU manual)  Thus - as I sensed earlier - divide by 2 likely fails...

    Further "dialing down" the divided system clock (perhaps by 8 or even 16) should still provide the info you seek (via F_Scaling) - and the lowered frequency output should be less, "ESD/RFI offending" and drain less current..

  • Hello rrom,

    On TM4C123 when we divide the clock for observation, we use a divide factor of 1000. This make computation easier (as 80KHz is 80MHz equivalent) and also scope plots look cleaner.

    Regards

    Amit

  • Amit Ashara said:
    also scope plots look cleaner.

    Might they look cleaner still - if (vendor's) hallowed 10MHz scope - was updated?  (cost cutting can go only so far...)

    Note poster's, "divide sys clk by 2" (for measurement/viewing) remains wrong!

  • Hello cb1,

    Quite a few times, passive probes w/o calibration plays havok with high frequency signals. It is good to be on the safer side avoiding such issues.

    Regards

    Amit