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TM4C1294XL Noise at 120mhz

Other Parts Discussed in Thread: EK-TM4C1294XL

Hi everyone,

I am playing around with the tm4c1294l board and I noticed something. When at set the system clock to 120mhz using the following command:

ui32SysClock = MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |
                                           SYSCTL_OSC_MAIN |
                                           SYSCTL_USE_PLL |
                                           SYSCTL_CFG_VCO_480), 120000000);

the noise on the 3.3V rail jump from 20mv peak to peak to more than 160mv peak to peak. At this noise level, the adc is completly useless.

Can someone tell me what is causing this problem and how to solve it ...

  • Appears that your playing w/vendor's official board - that's a proper starting point.  (custom - unless your nicely experienced - not so much)

    160mV peak to peak - assuming symmetry about 3V3 - represents a 2.4% deviation from your pure 3V3.  (80/3300)  That's sub-optimal - but not unheard of - and I'd be most reluctant to characterize that ripple voltage as rendering the MCU's ADC, "Completely useless."  (I believe that comment unfair - frustration overwhelms reality)  It would be useful if you'd measure the dominant frequency of that noise - and report.

    Most mixed signal ADCs cannot realize "rock steady" ADC results over their 2-3 least significant bits.  (sometimes even worse.)

    Undescribed is any load or your method of properly powering your board.  Too much demand upon the 3V3 regulator may account for your report of noise.  Also - we're not told how & where you made that noise measurement.  Ground lead of the scope should be as short as possible - along with proper placement.  (again - we don't know)

    To improve our ADC performance we typically employ a small, smt, ferrite-bead right at the MCU's Vdda pin - along with the usual filter & noise caps.  I don't know your board - and if or how analog signals are routed away from noisy digital.

    I'd check your 3V3 regulator - its input voltage - and for the presence of all filter & bypass caps.  As your MCU dials-up its speed - the current demand increases - and you may be stressing the 3V3 regulator - and/or the power source driving the input side of that regulator.

    Your 20mV noise report is very good - but we aren't told what system clock produced that.  Might it make sense to systematically increase system clock - and chart the increase in noise.  At the same time - monitor the current demand of the board - I'd bet heavily that current demand is rapidly ramping...

    No mention of the software functions - the degree of MCU loading - and any board to board interconnects appears - each aids such remote diagnosis. 

    More detail s'il vous plait - 160mV noise may/may not be normal/customary - that board, that system clock...

  • cb1- said:

    I'd check your 3V3 regulator - its input voltage - and for the presence of all filter & bypass caps.  As your MCU dials-up its speed - the current demand increases - and you may be stressing the 3V3 regulator - and/or the power source driving the input side of that regulator.

    It look like you were right. I am now powering the board using a external 3.3V power supply, and the noise level went back to 40mv. I try powering the 5v with my supply, but I was getting the same result as with the usb, so the "problem" really seem to be coming from the 3.3V regulator.

  • Good for you - always pleasant to, "diagnose/predict correctly." 

    Question now may be:

    a) is this issue limited to that specific board?

    b) if not - might that 3V3 regulator be improperly sized or require a higher input voltage @ increased current demands?

    c) might one/several of the MCU power pins be imperfectly soldered/connected?

    I'd expect that charting of the board's current draw vs. MCU's system clock would be reasonably linear.  (note: that curve will not reach 0mA @ System clock = very low - there will always be an MCU & board/component idle current.)

    If proper filter & bypass caps aren't adjacent to Vdda I'd add them.  Again - a small ferrite bead in series w/3V3 & Vdda noticeably helped our ADC.  (that bead & earlier mentioned caps all come together @ Vdda)

  • Hello cb1

    My suspect would be the regulator is not sized for current output. At 120MHz the current requirement would be much higher than at 16MHz. Not to exclude any IO activity of the High Speed interfaces.

    Another suspect would be lower cap's on the supply rails (if it is a custom board)

    Regards

    Amit

  • Hi Amit,

    Indeed we (often) think alike.

    cb1- said:
    Too much demand upon the 3V3 regulator may account for your report of noise.  Also - we're not told how & where you made that noise measurement. 

    Even though poster exceeded (normal/customary) "Does not work!" (always our fault) his description of, "steps taken to resolve" may not have risen to (past/departed) Template quality...  (my conscience is clear...)

  • Amit Ashara said:

    Hello cb1

    My suspect would be the regulator is not sized for current output. At 120MHz the current requirement would be much higher than at 16MHz. Not to exclude any IO activity of the High Speed interfaces.

    Another suspect would be lower cap's on the supply rails (if it is a custom board)

    Regards

    Amit

    Hi should have use EK-TM4C1294XL rather then TM4C1294XL in the title, I am using the launchpad board.

    I did not precise the way I mesure the noise because I don't consider myself qualified to do a good noise level measurement. The value I gave you are only useful as relative reference as they are measured using the exact same setup, with 2 differents clock frequency.

    As for the connection and active peripheral, nothing is connected to the board and the only code executed after coming out of reset is the clock change function.

  • That's very good (and necessary) added detail.

    Earlier post suggested a means (i.e. very short (or no) scope ground lead-length) during "noise" measurement.  (there are methods in the published literature which describe the forming of a, "scope-probe sized" conductive loop - thru which the scope probe passes (and connects to ground) which achieves optimal scope performance)

    With the (new) info provided - Amit/others should be able to replicate your test and report their findings.  (my group avoids "launch" and "too new" devices)

    Remaining of interest - your monitoring & measurement of current draw vs. System clock.  This may best confirm if the 3V3 regulator is indeed being, over-stressed...

  • Hello All,

    It would be important as well to know that is there some other device also connected to the same power rails as 3V3 and 5V0 which need to budgeted.

    Regards

    Amit

  • Amit Ashara said:

    Hello All,

    It would be important as well to know that is there some other device also connected to the same power rails as 3V3 and 5V0 which need to budgeted.

    Regards

    Amit

    There is also no other device connected, the board is connected to my laptop usb port.

  • Safarir said:
    As for the connection and active peripheral, nothing is connected to the board

    That @ poster's 11:17 writing - earlier today.  (recall my advice that "repetition" may predictably "dull" focus/recognition - yet more justification for (past/rejected) Template posting format...)

    As you have that board - your test/verify would be welcome/informing...  (again - we're not launch fans - have employed "10' rule"...)