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SPI connections

Hello All.

I am considering purchasing the EK TM4C1294, but before i would like to know how i could achieve the following:

- Using 3 of the SPI interface's (0,1 and 2) as master, being connected as the image below(x3), but what concerns me the most is if i connect SSIFss to the nSCS_C in TMC429, can i assign other GPIO to select the other 3 IC?

- Let's assume it's possible, i.e.

PA0 to TMC26x #1

PA1 to TMC26x #2

PA6 to TMC26x #3

to send info to #2, do i need to assert SSIFss  and PA1 low at the same time and initiate the data transfer, or just pull PA1 low and start the data frame?

Regards,

Nuno

  • Hello Nuno,

    Not sure what the 2 IC's do in your system. If the idea is to send data to #2, then as far as SSI protocol is considered you can select the appropriate device using it's CS and then send data and clock to it.

    Perhaps a better explanation would be to put a timing diagram of what you intent to do

    Regards

    Amit

  • My friend - have you not connected the SDO output of the Master (TM4C129) to the SDO outputs of each SPI slave?  Is that good?

    I'd expect that - instead - the Master's SDO output should connect to each Slave's SDI input.

    Unsure re: TM4C129x - but normally gpio serves nicely as CS for each/every SPI slave.  You must manually manage the CS toggle - but the remainder of the data transfer may proceed automatically.  (thus the benefit of SPI over "bit-banging.")

    I attach your original post's drawing for ready reference below:  (might you identify/describe TMC26x?)

     

  • Hello Amit and cb1.

    Thanks for your reply.

    The TMC429 is a motion controller up to three axes, that receives input from the mcu by spi, and can talk to the TMC26x by spi or by step/direction interface.

    TMC26x is a stepper driver, and in the image (taken from TMC429 datasheet) it is connected by the Step/Direction interface, although in the image the pins have the spi naming (they are multiplexed).

    The reason that TMC26x has spi interface from this IC to the main mcu (note that it is always a slave), is because it can report stall condition of the motor, and also for config/init purposes.

    Amit i cannot post a timing diagram right now, because i'm in the early stage of conception so i still didn't figure how i would be controlling the time.

    maybe an RTOS approach would be better here, dunno.

    @cb1_mobile:

    Toggling CS by hand, do i need to sync it to the serial clock?

    Or how could i manage the time delay needed depending the modes that i select to operate on?

    (by time delay i mean, in legacy mode, if i have SPO and SPH high or low, or if it is on the raising or falling edge).

    Thanks for the time spent.

    Kind Regards,

    Nuno

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  • Nuno Lopes said:
    Toggling CS by hand, do i need to sync it to the serial clock?

    Your hand/manual toggle of CS precedes your call to the (automated) SPI function - thus you avoid CS to clock sync issues.  After that SPI call terminates - you toggle CS back to disabled state.   (yet all other SPI sync requirements must be honored)

    You're silent as regards SDO of SPI master connected to SDO of each/every SPI slave.  But for the heralded launchpads - sold here - it is unwise to cross-connect push-pull outputs together.  As earlier stated - normal/customary SPI sees Master SDO tieing to SDI of each/every SPI Slave.  (your otherwise nice diagram ties all SDO's together - unless you too are attempting past "compatibility" (a la Launchpad) (doubtful) that's not normally best practice...)

  • cb1-mobile said:
    You're silent as regards SDO of SPI master connected to SDO of each/every SPI slave

    Does this answer your question?

    Nuno Lopes said:
    TMC26x is a stepper driver, and in the image (taken from TMC429 datasheet) it is connected by the Step/Direction interface, although in the image the pins have the spi naming (they are multiplexed).

    I'm sorry but i din't fully understand what you mean by stating this

    cb1-mobile said:
    As earlier stated - normal/customary SPI sees Master SDO tieing to SDI of each/every SPI Slave.  (your otherwise nice diagram ties all SDO's together - unless you too are attempting past "compatibility" (a la Launchpad) (doubtful) that's not normally best practice...)

    In the image that i posted, in the lower left corner MISO,MOSI,SCK lines are the ones from the mcu, let's say from SPI0, and CS_[0,1,2,3] could be PA[0,1,2,3].

    The IC's TMC 429 and 26x are treated both as slaves by the mcu.

    And i think (not sure because i didn't tested yet) that mcu talks to 429 giving actual target, velocity target, acceleration etc, then that ic does the math and sends to the 26x's the low level commands (step frequency, amplitude).

    And if the 26x sense that the motor is in stall condition they can send this data directly to the mcu, that's why they are connected. i only don't know if i need to make a sweep in slave select to see if there's data to be fetched, or if there is other way to flag that event.

    Kind Regards

    Nuno Lopes

  • This is approaching past presidential statement, "depends upon what is, is!"

    If it's correct that "SDO" marked thusly - your master (429) - is its SPI MOSI pin - your schematic shows that MOSI wired directly to each/every SPI Slave's "MISO" (i.e. slave output) pin.  Outputs should not cross connect - that's caused output contention - never good.  (confirmed by many/hapless Launchpad users)  I've pasted in your connection again - and yellow highlights my concern (valid if "SDOZ_C" is the equivalent of MOSI - that master)

    Note that much of my concern may spring from this vendor's (apparent) breach of the MOSI/MISO signal naming convention for SPI.  (God - and vendor - may be only two who recognize this novel, "SDOZ_C" designation!)

    I'd have to read the slave spec to see if they support a real/conventional SPI interface - and that's bit outside normal/customary MCU forum range...

  • Ok, now i get it :)

    now i see why you are concerned.

    429 never acts as master. the master is the the tivaC board.

    cb1-mobile said:
    (God - and vendor - may be only two who recognize this novel, "SDOZ_C" designation!)

    I know what you mean... but after a long reading in the datasheet, SDO = Slave Data Output, Z means it's in high impedance state when it's not being used, and C i think it's only an index.

    If you look now at your yellow highlight, you notice that MOSI is in fact connected to Slave Data In, which indicates that it's the normal/conventional spi interface.

    Regards

    Nuno Lopes

  • Nuno Lopes said:
    429 never acts as master. the master is the the tivaC board.

    Look - I wish you well - but never - in a million years - would myself/others have guessed that there's yet another MCU (hidden from your diagram) and that (hidden) MCU is the Master!

    I've tried - raised the point I believe to be valid - I've others waiting (soon yelling) so best of luck et "je suis departer..."

  • I'm sorry! I should have edited the image and put there a mcu.

    Thanks very much although for being helpful!

  • Hi,

    I think there are also some other problem(s) - the o/p claim in its first post:

    - Using 3 of the SPI interface's (0,1 and 2) as master, being connected as the image below(x3),...

    Either we see the schema for a single SPI, either the o/p presumes there are three pins which may be common to all three SPI interfaces and only FSSx can be distributed separately, which is not correct.

    Petrei

  • Petrei said:
    Either we see the schema for a single SPI, either the o/p presumes there are three pins which may be common to all three SPI interfaces and only FSSx can be distributed separately, which is not correct.

    The schema presented it's only for one spi, but i intend to connect another 2 set's of IC's as the image represent's givin in total 3 TMC429 and 9 TMC26x.

    Plus the FSS would be replaced (i.e.) by PA 0 to 8.