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TM4C129ENCPDT Hard Fault

Christopher Jack
Prodigy 110 points

Hello,

I am trying to run my section of main code starting at address 0x4c000 when I get a forced hard fault because of a delayed bus fault or an undefined instruction. It always happens at LR(R14) = 0x00053da3, which is during the execution of the first task my bios runs. I am not sure if it is normal for an address to line up like that.

My stack and heap size seem to be reasonable but maybe stack is still too small? I don't know why things would go awry at this point every time. Here is a screen shot of the disassembly at the last address.  

I am not sure what to check from here or what other potential problems could cause this. I am also wondering if it could be a problem with my mapping though the command file.

ARM Compiler 5.1.7, TI-RTOS 1.21.0.09, XDCtools 3.25.4.88

Thanks for any help/advice

  • 0
    Guru 92251 points

    Christopher Jack said:
    I am also wondering if it could be a problem with my mapping though the command file.

    What mapping does the command file do?

    From the SYS/BIOS the Program Counter reported when the Delayed Bus Fault occurred was 0x2001ae58, which is is RAM rather than FLASH. The disassembly reports a branch to $Tramp$$TTL$L$PI$$calculate_checksum which suggests a linker generated trampoline has been use (see http://www.ti.com/lit/an/spraa46a/spraa46a.pdf)

    Did you intend for some functions to be run from RAM?