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SPI communication

Other Parts Discussed in Thread: ADS1259, TM4C123GH6PM

Hi,

Is it possible to configure SSI in regular SPI mode to send more data when CS is low?

We'd like to communicate with ADS1259 but ADS1259 assumes CS Low during device setup.

So ADS1259 requires the followings: set CS high, pull CS low, send 6 data using SPI, pull CS high.

But the TM4C SSI documentation says that CS is pulled up and down between sending words.

  • Since the ADS1259 uses data 8 bits at a time, you can use "Full duplex Advance SSI with 8-bits of packet data". You did not mention which TM4C device you are using, but this is from section 20.3.3 of the TM4CTM4C129ENCPDT datasheet.

  • May I applaud the depth, care & detail of vendor Bob's answer? Nicely done.

    That said - it should not have been hard to "predict" the arrival of such "beyond elementary" SPI packet data transfers. The "wear/tear" upon both vendor responders - and ALL here (forced to "search" for such helpful detail) - could be substantially reduced if several (added) examples detailing "advanced SPI packet management" were created & (properly) publicized/presented. (too often such "tech aids" are suppressed (almost hidden) & known (only) to vendor staff - that cannot be good - and is surprisingly/strikingly curious...)

  • This is available only in TM4C129x series? (in TM4Cx)
  • If you give me the full part number I can be more specific. TI has lots of parts that begin with TM4C. The 'x' is a placeholder.

    For example in the TM4C123GH6ZRB datasheet, section 15.3.4.4 describes the format that you want. Notice the last paragraph:

    "For continuous back-to-back transfers, the SSInFss pin is held Low between successive data words, and termination is the same as that of the single word transfer."

  • My device is TM4C123GH6PM (I can change to any other TM4C123x or TM4C129x however TM4C123x would be better)

    I'm using the <TivaWare>\examples\peripherals\ssi\spi_master.c example as starting point. I've removed the UART related code. I've removed the receive part also, so this code will send 3 byte as spi master.

    My question: how Fss will behave? Fss will go idle and go Low between sending words or will go to idle state only at and of the transmission?

    If Fss will go idle and go Low beetwen sending words, how should I modify the code to keep Fss at low in the frame?

    Fss will be generated by the MCU or Fss should I toggle from the C code?

  • Since the CS on the ADS1259 is not required, the simplest interface would be to configure a pin as GIO and drive it low when talking to the ADS1259. In fact, if you have no other devices sharing the SSI module that is connected to the ADS1259, you could tie CS on the ADS1259 low. If using a GIO to control CS on the ADS1259, make sure you do not drive it high until the last bit has shifted out of the last byte in the FIFO. (Wait for the BSY bit of SSISR to go low.)

    But to answer your specific question, in this mode the Fss pin will stay low as long as the FIFO stays full. That may be difficult if you have interrupts that keep the CPU busy for too long.
  • This behaviour depends on SPH?
  • Yes, when in Freescale format the behavior of Fss between bytes while the transmit FIFO is not empty depends on SPH.