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TM4C123GH6PZ: PE0-PE3 5V tolerance

Part Number: TM4C123GH6PZ

If PE0-PE3 are being used as the analog inputs AIN3-AIN0, and the reference voltage they have is 3.3V, can they withstand 5V? In worst case scenario these inputs can see up to 5V, would this be an issue. Following what the DS says is a bit hard since it's mentioned: 

- All GPIOS are 5V tolerant except e.g. PJ0.

- The AINx analog signals are not 5V tolerante and go thorough an isolation circuit before reaching their circuitry.

We also have this appnote that says that 5V shouldn’t be an issue: http://www.ti.com/lit/an/spma053/spma053.pdf.

Can you help out with a definitive answer? They don't need to be working at 5V, as it would be out of the measurable range, they would just need to survive the 5V.

Thanks,

Tadeo

  • Hi Tadeo,

    Why don't you use a step down(Buck) DC/DC converter module. In this way, you can be sure nothing goes wrong.
    Please take a look at links bellow.

    DC/DC Buck converters

    Step Down Buck Converters

    I hope this helps.

    Regards,

    Hossein

  • Hello Gerardo,

    The key concept here is that the pins need to be in GPIO Input/Output mode for the 5V tolerance to be within specification. This means they have to be configured as such by the MCU. If they are configured for other peripheral operations, then they are no longer in GPIO mode and the 5V tolerance would be dependent on any specific peripheral specifications.

    The app note you linked highlights this as well as it speaks specifically of GPIO's in Input Mode (and GPIO's in Digital Output Mode).

    Table 1 within that app note states the following for Analog Functions (which includes AIN0-AIN3): "Clamping protects internal circuitry, allowing voltages greater than VDD to be applied to GPIO pins, but analog specifications are not ensured if the voltage applied to the pin is not in the range 0 V to VDD."

    Therefore, the definitive answer is that if PE0-PE3 are set as ADC inputs, they are not in GPIO Input mode and 5V tolerance is stated as follows from Page 1354 of the device datasheet: "The AINx analog signals are not 5-V tolerant and go through an isolation circuit before reaching their circuitry."
  • Hi Ralph,

    Beyond your (usual) sage advice - poster/users may consider employing, "Quad, R2R" (rail to rail output) Op-Amps - powered from VDD.    (where VDD = 3V3 - in most cases)     The advantage of the "R2R" amplifiers is their ability to produce output levels - extremely close to their,  "3V3-powered" RAILS!      (more "normal" Amps will suffer a reduced output voltage - sometimes imposed upon (both) their, "VDD & GND RAILS!"    i.e. such amps will be unable to provide (near) 3V3 - as their high level - and equally unable to provide (near) Gnd - as their low level!   That "lost voltage" may reach to 1V5 - from "EACH Output RAIL!"    (thus reducing the "voltage span" - when powered from 3V3 to 300mV!     (1.5V to 1.8V, only)    Such proves WHY ... "R2R op-amps RULE!"    (frequency response should be checked, too)

    Such "3V3 powered" amplifiers provide several advantages:

    • limit the voltage input to the ADC channels to VDD
    • lower the driving impedance to better match the ADC's "Input Specifications"

    Certain such "R2R" op-amps are accepting of input voltages (above) their powered levels.   (this MUST be checked)     Otherwise - any/all analog signals - reaching to (near) 5V - may be run thru a "3V3/5V0" voltage divider (66%) limiting such signals to 3V3.     The presence of the voltage divider - prior to the amplifier - avoids the "added impedance" imposed by the voltage divider - if placed (instead) at the amplifier's output.