Hi,
This program loops TX to Rx internally . What I receive is not related to what I sent. Why ?
#include <lm4f120h5qr.h>
uint8_t send = 0x00;
uint8_t myrxd = 0x00;
void ReadSPI(void){
while ( (SSI2->SR &(1<<2))== 0); //wiat while empty
myrxd = SSI2->DR;
}
void writeSPI(uint8_t data){
SSI2 -> DR = data;
while( (SSI2 -> SR & (1 << 4)) == 1);// wait while busy
}
int main()
{
//15.4 Initialization and Configuration
//1. Enable the SSI module using the RCGCSSI register (see page 346).
SYSCTL -> RCGCSSI |= (1 <<2); // SSI2
//2. Enable the clock to the appropriate GPIO module via the RCGCGPIO register (see page 340).
SYSCTL -> RCGCGPIO |= ( 1 << 1); // PORT B
//3. Set the GPIO AFSEL bits for the appropriate pins (see page 671). To determine which GPIOs to
GPIOB ->AFSEL |= (1 <<4)|(1<<5)|(1<<6)|(1 <<7);// PB4-PB7 SSI pins
GPIOB ->PUR |= (1 <<4)|(1<<5)|(1<<6)|(1 <<7); // enable pull-up
//4. Configure the PMCn fields in the GPIOPCTL register to assign the SSI signals to the appropriate
//pins. See page 688 and Table 23-5 on page 1351.
GPIOB -> PCTL |= ( 2<< 16) | ( 2<<20) | (2 << 24)|(2 <<28); //PMC 4/5/6/7
//5. Program the GPIODEN register to enable the pin's digital function. In addition, the drive strength,
GPIOB -> DEN |= (1 << 4) |(1<<5)|(1<<6)|(1<<7);
//For each of the frame formats, the SSI is configured using the following steps:
//1. Ensure that the SSE bit in the SSICR1 register is clear before making any configuration changes.
SSI2 -> CR1 &=~(1<<1);
//2. Select whether the SSI is a master or slave:
SSI2 -> CR1 = 0x00000000;
SSI2 -> CR1 |= (1<<0); // Internal loop TX-RX
//3. Configure the SSI clock source by writing to the SSICC register.
SSI2 -> CC = 0x00; //sys clock
//4. Configure the clock prescale divisor by writing the SSICPSR register.
SSI2 -> CPSR = 0x10;
//5. Write the SSICR0 register with the following configuration:
SSI2 -> CR0 = (0x7<<0); //0x0007
//6. Optionally, configure the SSI module for µDMA use with the following steps:
//7. Enable the SSI by setting the SSE bit in the SSICR1 register.
SSI2 -> CR1 |=(1<<1); //enable SSI
while(1)
{
writeSPI(send++);
for ( int x=0; x <10 ; x++){
for (int i=0; i < 100000;i++);
}
ReadSPI();
for (int i=0; i < 1;i++); //for break
}
return 0;
}
