Part Number: DRV8703-Q1
For SPI communication between STM32F1 and DRV870x-Q1 chip, I am able to send the command data over MOSI but MISO line remains low during transfer and expected data is not received.
DRV870x-Q1 chip is enabled(not in sleep mode). None of the pins are shorted. Screenshot is for config register but behaviour is same for other reads also.
SPI configuration for STM master:SPI mode: mode 0First bit: MSBDirection: full duplexWe tried different Baudrates 9MHz,4 MHz
Note that I am looking into this issue.
Have you tried utilizing a oscilloscope instead of the Saleae software to verify the SO reading?
Hector HernandezMotor Applications Team
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In reply to Hector Hernandez Luque:
Have you verified how fast SO slews high? I wonder if you need to slow down your frequency so the SO voltage is recognized by the logic analyzer software when it needs to. It might be taking too long for the sample to be read when it needs to be read.
Any update to this thread? Thank you.
Thanks for your reply. It seems that there is documentation issue in DRV870x-Q1 datasheet.
"Section 184.108.40.206 of datasheet DRV8702-Q1, DRV8703-Q1 SLVSDR9D –OCTOBER 2016–REVISED DECEMBER 2018" has conflicting statements for SPI mode configuration. First it says CPOL and CPH should be 0(SPI mode 0) but then it says "Data is captured on the falling edge of the clock and data is driven on the rising edge of the clock" which matches to SPI mode 1. So when I used SPI mode 1, everything works perfect. Please let me know your comments.
In reply to Balkrishna Amrutrao:
Thank you very much for the finding. The datasheet should state CPHA must be set to a 1.
I will add this change to our datasheet changes. Thank you.
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