DRV8702D-Q1: Vdrain impacting current regulation ?

Guenter Fettig

Intellectual 1540 points

Part Number: DRV8702D-Q1

Does the level of Vdrain have an effect on sensitivity of internal current regulation amplifier ?

For zero current and 5.5<Vdrain<12V, Voltage at SO pin is 480mV.

For zero current and Vdrain<5V, Voltage at SO pin is 200mV less.

Motor not spinning at Vdrain<5V, but value will be used for 0A reference.

Please explain relationship Vdrain - SO Voltage for this range of Vdrain.

over 5 years ago

0 James Lockridge19 over 5 years ago

TI__Genius 14485 points

Hi Guenter,

I'm not sure I understand your question. The VDRAIN pin should always stay at the VM voltage level, and it is used to measure VDS of the high-side FET for overcurrent protection. The VDRAIN pin doesn't relate to the current sensing circuit.

Are you referring to the supply voltage, VM? The sense amplifier is powered from LDO regulator, AVDD, so I don't expect much change throughout the recommended operating range of the device (5.5-45 V). At VM = 5 V, the device is in UVLO, and AVDD won't be able to regulate properly. I would need to confirm with the design team to understand the state of AVDD and the sense amplifier, but my feeling is that there may not be a clear relationship due to the UVLO condition. Let me know if you need me to investigate this further.

0 James Lockridge19 over 5 years ago in reply to James Lockridge19

TI__Genius 14485 points

Hi Guenter,

Did my last post answer your question? Please let me know if you need me to look into this further.

0 Guenter Fettig over 5 years ago in reply to James Lockridge19

TI__Intellectual 1540 points

Vm level is always held at 12V.

Avdd is always held at 5V.

Vdrain connects via 6.8V Zener Diode to Vm, to protect spikes.

In this configuration, Vdrain level impacting sensitivity of internal current regualtion amplifier, like described.

0 James Lockridge19 over 5 years ago in reply to Guenter Fettig

TI__Genius 14485 points

The image didn't post properly. Can you please try reattaching it?

0 user5932623 over 5 years ago in reply to James Lockridge19

Prodigy 80 points

Hi James,

I would like to catch up on this question as I am also involved in this topic.

VM is supplied with 10 - 12V, while VDRAIN is open. We need this "intermediate" state for current calibration purposes. Diode D10 protects VDRAIN due to the datasheet requirement VM - VDRAIN < 10 V.

So what we basically observe is, that SO goes up from 280 mV to 490 mV as soon as VDRAIN exceeds 4.5V and back to 280 mV as VDRAIN drops below 4.5V. The voltage on VDRAIN results from VM - V(D10).

According to the datasheet, the UVLO1 bases on VM, not VDRAIN. But, it seems to me, that the IC stopps suppling ISP (SP input current) based on VDRAIN.

Best Regards,

Marc

0 James Lockridge19 over 5 years ago in reply to user5932623

TI__Genius 14485 points

Hi Marc,

Thanks for the details. I'm sorry for the delay; I was travelling recently. Let me check with our design team about this particular use case.

0 James Lockridge19 over 5 years ago in reply to user5932623

TI__Genius 14485 points

Marc,

The issue you see is related to OCP circuitry in the DRV8702D-Q1. When the VDRAIN voltage is larger than 4.5 V in your condition, the OCP circuitry enables and begins drawing a current from the SP pin. This causes the SO output to increase.

0 James Lockridge19 over 5 years ago in reply to James Lockridge19

TI__Genius 14485 points

Marc,

The IC designer recommends calibrating with VDRAIN powered, if possible. He said that this offset caused by OCP leakage current can vary between 13 uA and 45 uA, depending on the VDS setting.

0 user5932623 over 5 years ago in reply to James Lockridge19

Prodigy 80 points

Thanks James,

we will calibrate at VM > 12 V (which means VDRAIN > 5.2 V). So when you say "VDRAIN powered", you mean above 4.5 V?

Does this leakage current also vary with VDRAIN or is it stable once VDRAIN is above 4.5 V?

Best Regards,

Marc

0 James Lockridge19 over 5 years ago in reply to user5932623

TI__Genius 14485 points

Hi Marc,

The leakage current should be stable with respect to VDRAIN if it is above 4.5 V. However, the it will vary with the VDS setting.

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DRV8702D-Q1: Vdrain impacting current regulation ?