This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRV8873-Q1: Relationship between nFAULT pin and FAULT status register value

Part Number: DRV8873-Q1

Hi,

I used the DRV8873S-Q1 to design my DC motor control board.
When measuring the nFAULT pin with the oscilloscope, the nFAULT pin indicates Low.
The value of the FAULT status register at that time is 0x40h.
I want to know what kind of Fault it is.

  • Hi Sungkon,

    What register settings are used in your system?
    What is your VM voltage?
    Is it possible the VM voltage drooped below 4.1V reset the device?
  • Hi, Rick

    1. The register settings are shown below.

        IC1 : 0x41h

        IC2 : 0xECh

        IC3 : 0x40h

        IC4 : 0x08h

    2. The voltage of VM is 24 V.

    3. V(UVLO) condition is not possible.

    Thank you very much. 

  • Hi Sungkon,

    I do not see any problems with the register settings.

    Can you provide scope captures of the outputs and current just prior to the fault occurring? You may have to zoom in to see what is occurring prior to the fault, and zoom out to determine if the outputs re-enable after some time.

    When the fault occurs, what action is required to re-enable the outputs?
    Do the outputs automatically re-enable?
    If so, how long are the outputs disabled?
    Do you have to write a CLR_FLT or toggle nSLEEP?

    How much bulk capacitance do you have on VM?
  • Hi, Rick

    The difference between the nFAULT pin state and the value of FAULT status register is probably a bug in our own test program.
    The nFAULT pin state is considered to be due to thermal shutdown.
    When a fault occurs, the re-enable operation is set to CLR_FLT. The capacitor of VM is 1000uF / 50V.
    Thank you for your help.