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DRV8350: DRV8350 SPI SDO not output Date

Part Number: DRV8350

MCU  SPI Output 0x9481 Read  0x02 Register, But DRV8350RS  SDO  have no Signal,  pls help 

  • Chai,

    Please mark for me on the scope plot all the SPI signals.

    Regards,

    -Adam

  • Chai,

    1. Why does your nSCS stay low at the end of the transaction?
    2. I see you are trying to read register 0x02, why are you sending data during the read operation?
    3. Have you tried removing the MCU and any filter from the SDO line? Maybe the MCU is holding the SDO high? Please keep the 1k pullup to 3.3V, this is required.

    Regards,

    -Adam

  • Hi Adam,

    here is the feedback from customer:

    1Why does your nSCS stay low at the end of the transaction?  

    it doesn't keep as low, after around 20uS, it jumped back to high. please check the screenshot below:

    2 I see you are trying to read register 0x02, why are you sending data during the read operation? 

    Sending data should not be influenced by reading data.  

    3 Have you tried removing the MCU and any filter from the SDO line? Maybe the MCU is holding the SDO high? Please keep the 1k pullup to 3.3V, this is required

    here is no filter, only 1kohm.

     

    do you have more suggestion? thanks

  • Hello Chai,

    As a simple thing, please confirm VM > 10V, VDRAIN > 10V, and ENABLE is high (3.3V). Please also check that the part is ON by measuring DVDD voltage as 5.0V (this may seem very obvious but I want to politely confirm it since it was not asked in this thread). SPI does not respond when the part is unpowered or if ENABLE is low (sleep mode).

    Can you measure to see if there is a diode between GND and SDO line internal to the IC (you sould be able to use a digital multimeter to do this by placing + on GND and - on SDO line in diode test mode)? It should read 0.5-0.8V. The power can be turned off from the system for this test, but make sure MCU is not connected to SDO line. The SDO pull-down MOSFET has an internal body diode and if we cannot detect a diode here (DMM reads open) this tell us that the internal structure is damaged or if the SDO pin is not making contact to the PCB trace (cold solder joint, etc).

    You can take a look at Figure 40 (top of page 41) from the DRV835x datasheet for a picture of this diode structure on SDO.

    Thanks,

    Matt Hein

  • Dear Hein,

    Checked the controller, DVDD output is 5.0V and SDO diode feature is correct also. Could you help to check which conditions must be correct when Initiate communication with smart gate driver?

    By the way, could you give a reference code to test the SPI interface with DRV8350

    Thank you very much!

    Wilson Wang

  • Dear Hein,

    Can reset the Vds overcurrent, Vsense overcurrent fault conditions for ENABLE PIN with 8-40us pulse?

    What's meaning for Gate Driver Fault(GDF)?

    Thank you!

  • Hello WIlson,

    Communication with the Smart Gate Driver must occur after the part is powered on (VM > 10V, VDRAIN > 10V, and ENABLE is high), and you should wait for 1ms from the ENABLE pin going high, this is the wake-up or turn-on time in the driver. After 1 ms the driver is ready for communication after completing power-up sequence.

    For reference code, we have released SPI code with our EVM: LINK and download "DRV8353RS/H-EVM Firmware"

    Any fault can be reset (without putting the driver to sleep) by taking ENABLE pin low for 5-40us and then returning to high. If the pulse is shorter than 5us, nothing will happen. If the pulse is longer than 40 us, the driver will shut down and enter sleep mode (all SPI register settings are lost when the part enters sleep mode or powers down). The fault can also be reset by setting the CLR_FLT bit over SPI (register 0x02h bit 0).

    Gate Drive Fault is a specific protection feature in Smart Gate Drivers intended to prevent damage in the case of gate driver output short to ground, supply, or other node. It will also protect the system if the MOSFET gate is shorted or damaged. You can read more in these technical documents: LINK1, LINK2, LINK3. There is also a video explaining Smart Gate Drive technology: LINK.

    Thanks,

    Matt

  • Hi Matt,

    Could you help to give a list the show the sequence from power-up to SPI communication success? Which conditions must be met and time interval for each stage? The main issue is communication fail between MCU and Smart Gate Driver, The Driver is no response always.

    When the DRV8350RS is enabled and start to communicate, the SDO output is no longer always high, but it is still abnormal and the SDO becomes exactly the same as the nSCS. See below picture.

  • Wilson,

    Can you confirm if this issue is seen on only one board or device?

    Please share the schematic.

    Regards,

    -Adam

  • Wilson,

    May I close this thread as we are discussing over email?

    Regards,

    -Adam

  • Update from customer:

    SPI was working correctly, the register written happened to be all cleared so nothing was being returned on the SDO.

    Regards,

    -Adam

  • Wilson,

    If your issue has been resolved, please help us out by clicking the green “This Resolved My Issue” button.

    It helps us when the customer can confirm the right answer as other customers can use this confirmation as guidance.

    If you have a related question, please use the orange "Ask a related question" in the top right corner of the page.

    Regards,

     

  • Wilson,

    Could you please click  the green “This Resolved My Issue” button?

    It would help me a lot.

    Regards,

    -Adam