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DRV8825: About V3P3OUT(15pin)

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Guru 21045 points
Part Number: DRV8825

Hi Team,

 

We don't use V3P3OUT (3.3V) for VREF and other circuit.

Because, our load current is more than 1mA.

Therefore, we use the external 3.3V or 5.0V(without VREF) by LDO or DCDC.

Then, is there a recommended power supply sequence?

(For example, 3.3V or 5.0V must be less than VM voltage etc.)

 

According to the Absolute Maximum Ratings of Digital pin voltage and V(xREF) input voltage is 7V(max) and 4V(max).

So, I understand that there isn't the limit for Power supply sequence.

Is my understanding correct?

 


Regards,

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  • 0
    TI__Guru 56650 points

    Hide,

    The above picture shows a typical start-up sequence. The V3p3OUT timing should be close to nSLEEP flipping up edge. In your schematic, the nSLEEP is tight to 3.3V external power supply. It should be good. Since nENBL pin enables output in the beginning, I recommend the STEP signal should be given after input power supply voltage is stable.

  • 0 in reply to Wang5577
    Guru 21045 points

    Hi Wang5577-san,

    Thank you for your comment

    I’d greatly appreciate your verification.

    Regards,

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