DRV8320: DRV8320H - problems with latched nFault
Part Number: DRV8320
I refer to my previous posts regarding DRV8320. I did a lot of tests with the driver (measure of Gate Source voltage at HS and LS, improve signal routing at the board, add addtional GS capacitor to improve dv/dt capability). At room temperature and above (up to 40°C) it worked fine. But now we did cold tests (-30...0°C) and now I saw the GDF again and the driver was again destroyed (next screenshot: channel 1 driver fault output, channel 2 phase current). Now I'm really unsatisfied and didn't have any idea what I can do to improve.
Do you have any suggestion what I can do? Addtional clamping or protection circuit?
Please post plots showing the high side Gate to Source voltage and the low side gate to source voltage for all three phases at the negative temperature.
We need to check if there is any unexpected behavior in the switching of the gates which is causing the gate drive fault.
Are you sure that the board is not seeing any moisture/frosting during the test?
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