Hello!
My team and I are trying to capture four simultaneous streams of 1080p60 video and up to 2.7k @ 24fps onto embedded storage.
These are the two configurations (with outputs) we're going for:
4 x Sony IMX117CQT: Digital 10-bit/12-bit 10 ch Sub-LVDS, 576 Mbps serial output
4 x Sony IMX179: CSI2 serial (COB), 2/4-lane MIPI serial (FC)
Any recommendations for development platforms that can handle this would be great. Thoughts on using FPGA or DSPs are welcome.
Thank you,
Cyrus
Hello Cyrus,
#Q1: 4 x Sony IMX117CQT: Digital 10-bit/12-bit 10 ch Sub-LVDS, 576 Mbps serial output
- To connect LVDS to MIPI CSI2 it is necessary to be used MIPI CSI02 TX bridge. The Bridge converts a standard parallel video interface into CSI-2 byte packets. For example see SN65LVDS315 camera serializer or TC358746 camera bridge.
#Q2: 4 x Sony IMX179: CSI2 serial (COB), 2/4-lane MIPI serial (FC)
- To connect 4x CSI sensor to OMAP's CSI2, it is needed to use MIPI switch or CSI multiplexer with I2C control logic. Unfortunately, I don't know if TI offers CSI multiplexer ICs. However it is possible to use: FSA642 and NX3DV642.
You can use and FPGA and then the picture will be:
Best regards,
Yanko
Hello Cyrus,
#Q1: Do I need two per camera, one acting as the transmitter, the other as the receiver?
- At first, I think, that you must choose, how your camera will be used - as a transmitter or a receiver. For example:
Camera bridges incorporates a Mobile industry Process or interface (MIPI) Camera Serial interface Type 2 (CSI-2) that functions either as a CSI-2 receiver or as a CSI-2 transmitter.
It can be configured to connect to a camera with a parallel interface or with a CSI-2 interface. This enables camera selection to be based on performance, and mechanical and electrical criteria, rather than interface connectivity requirements to the Host processor. It can be configured to function as a bridge from a parallel - interface sensor to a MIPI CSI - 2 Host or from a MIPI CSI - 2 sensor to a parallel - interface Host.
#Q1: Also, how should I tackle the issue with the 10/12-bit output using the 8-bit bridge?
- The answer on this question depends on CSI-2 bridge characteristics: see the example for TC358746:
I suggest referring to section 8.2.3.1 ISS CSI2 PHY Overview in OMAP4460 TRM. The CSI2 supports MIPI CSI2 multiple data type formats. Two MIPI D-PHY-compliant CAMERARX PHY receivers immediately before the ISS interfaces act as a physical connection and configuration of clock/data lanes with external sensors. CAMERARX PHY supports up to four configurations, depending on the required number of D-PHY data lane external
sensors.
For 4 cameras, you must use 4 CSI bridges, not 8.
#Q2: Given the correct CSI multiplexer, should it interface directly with the OMAP? Or is a separate receiver necessary?
- Yes, CSI multiplexer can connect directly to OMAP's CSI-2 DPHY. However, it is needed to be observed the specific design characteristics for the CSI multiplexer.
The CSI multiplexers are optimized for switching between two MIPI devices, such as cameras or LCD displays and on - board Multimedia Application Processors (MAP)
For more information - see the following discussions in e2e about the topic:
http://e2e.ti.com/support/interface/digital_interface/f/130/t/155683.aspx
http://e2e.ti.com/support/interface/high_speed_interface/f/138/p/308299/1073443.aspx
Best regards,
Yanko
