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Maximum conductor length for DSI lines

Hi

We are using OMAP4430 silicon revision ES2.3 for our custom board.

We are using DSI1(2 data lanes and 1 clock lane) for display.

The clock lane frequency we are using is 320MHz(max.) and we are using ~ 640MBPS data transfer per lane.

The connectivity diagram for DSI lines in our board is shown below.

We have seen the Data Manual section:

"MIPI D-PHY PCB Guidelines in OMAP4"
Where it states that in general Guidelines "Total conductor length on OMAP board < 100 mm"

We would like to know what will be the issues faced(if any) when this length is greater than 100mm.For now,the total conductor length in our case is 350.5 mm and it is working.

Regards

Mahesh H M

  • Hi Mahesh,

    The total conductor length is suggestion which is verified with various conditions. Your setup maybe working now but you never know how it will behave in high noise environment. Or if the pixel signal varies that way to generate cross-talk. So i suggest using the stated note in mind especially when you are using the high speed setup.

    Regards,

    Boyko

     

  • Hi Shridhar,

    I have Referred the OMAP4 datasheet version D.

     Section A.4.1 General Routing guidelines. (Page No. 418)

     The flight time for the signals must not exceed 2 ns, which assuming a PCB constructed from standard

    FR-4 material, would imply a maximum trace length of approximately 10” (25.4 cm).  This requirement is for maximum data rate operation (1Gbits/Sec).

     OMAP board conductor length <100 mm.  (is given in page 427)

     Please refer Page No.420 in the datasheet.

     

     

    I understand that if I divide your total conductor length into off chip and on chip,

    -          on chip length is  omap to conductor board length  = 32 mm

    -          off chip length is micro coax (320) + connector to display IC on display board (8.5) = 328.5

     

    OMAP board PCB spec says you can have on chip length upto 100mm (page 427) and  total trace length(includes on chip + off chip) 25.4 (in page 418). In that case can I redefine you question like maximum trace length allowed is 25.4cm (on chip+ off chip) and in you are design the trace length is 350.5mm? let me know if I am wrong in my calcuations?

     

    Also could you mention the distance between display IC on display board to micro display? Is that the separate MIPI?

     

    Regards,

    MM

  • Thanks Mahesh For your response on this. Your understanding below is perfectly correct.

     

    The display interface between display IC to the Micro Display is not MIPI.

     

    The total conductor length is  in actual almost 35 cm where as  maximum length of spec says 25.4 cm.

     

    How do we justify the greater length operation ?

     

    So in this scenario what is the dependency on frequency of operation.as you mentioned

     

    that the 2nS flight time (25.4cm conductor length)

    " is assumed to be across all frequencies." from your previous mail where as in this mail you say it is for the maximum data rate operation of 1Gbits/Sec.

     

    Regards

    Sridhar

     (posted by MM)

  • Hi Shridhar,

    could you test with 1Gbits/sec frequency with increased length from the spec. may be its working fine now because the your operating frequency now is 250 Mhz.

    Regards,

    Mahesh

  • Hi Mahesh,

    I think you got you answer clarified, If you can mark the post as Closed/Verified it would be great.

    Regards,

    Boyko

  • Hi Boyko,

    could you provide me logical explanation as why its working with extra conductor length? (its deviated from the spec). right now the data rate used is 500Mbs effectively. will this extra conductor length work if I use the 1GB/s?

    Regards,

    Mahesh

  • Hi Boyko,

    do you have any inputs for above questions? is there any reason why it should not work if the conductor trace length is more than the recommended.

    Regards,

    Mahesh