• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 101 subscribers
  • Views 649 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

How to protect L3 interconnect control registers from being access by IAs

frank li2
Prodigy 10 points
Other Parts Discussed in Thread: DM3730

How to configure the L3 interconnect control register to prevent an IA (e.g., IVA subsystem) from changing the L3 interconnect control registers? For the firewall configuration, I think it is reasonable that the IA cannot access the target's L3 configuration registers. However, I did not find details about this.


Btw, I am using DM3730. I guess the feature should be similar on OMAP4 processors.

Many thanks!

Frank

  • 0
    TI__Guru**** 161600 points

    Hi Frank,

    Initiators cannot change L3 settings, they are simply masters in the L3_NOC communication. Initiating read/write request to the L3_NOC means that IA can read/write to any of the L3 targets (TA) it is connected to (functional connections between IA and TA are hardwired and should be depict by a connectivity matrix in the device TRM).

    L3_NOC transactions are managed by the device MPU. IA, TARG, FW register physical addresses shown in the L3 chapter are the physical addresses of the hosts, targets, firewalls as seen by the device MPU.

    Hence L3 registers are changed only if your software explicitly instructs modification of the L3_NOC configuration.

    This is the case in OMAP44xx devices. For more detailed & DM3730 specific information about L3_NOC you should write in the corresponding DM37x DaVinci Video Processor Forum: http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/537.aspx

    Best Regards,

    Yordan