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Jacinto6 how many Conrtex-M4 cores?

Other Parts Discussed in Thread: DRA746

I notice in the  dra746.pdf:

Two Cortex-M4 image processing unit (IPU) subsystems, each including two ARM Cortex-M4...

Does that mean that we have 4 M4 cores available in two separate subsystems (each with two cores). Thus we could run two Ti-RTOS (SMP)  with two cores in each IPU?


Thanks in advance,

Javad

  • Hi Javad,

    Yes, Vayu has 4 Cortex-M4 cores integrated in two IPUs (IPU1 & IPU2).

    But one of the IPU subsystems (IPU2) is dedicated only for IVA-HD accelerator (hw encoding/decoding).

    So only IPU1 is available for general purpose usage, hence two Cortex-M4 units IPU1_C0 and IPU1_C1).

    Best Regards,

    Yordan