Hi,
I'm developing a 64 channels rx ultrasound board. I'm intent to use 8 x AFE5808 for the analog rx chain.
Do the LMK03806 is a good choice for clock all the AFE5808 (clk_adc, clk_16X, clk_1x)?
Regards,
Santiago
Santiago,
The LMK04806 is probably a better solution. What is your clock rate that is needed?
0508.A9RBF9D.pdf
Thanks,
Chuck Smyth, Apps Engineer, TI Medical
Hello Chuck,
The frequency for the ADC sampling need to be up to 65 MHz. And other frequencies I need could be up to 128MHz. I prefer all outputs in LVDS electrical characteristics.
The specs in the datasheet are really good, but im afraid because I had a bad experience in the past with this kind of components, it demanded much time to debug and make it work. Do you provide support or evm for this part?
Regards.
Alan is the applications support person for these clock devices:
Alan.Ocampo@ti.com
You can ask him detailed questions about the datasheet, etc.
I hope that this helps.
Chuck Smyth
Hi Chuck- Thanks for passing along my name.
Hi Santiago,
I recommend the LMK04800 for Ultrasound clocking to meet the requirements for system clock synchronization and excellent close-to-carrier output phase noise. I think the LMK04806 option could hit the target frequencies, but it depends on what other frequencies you might need. A high-quality VCXO with good close-in phase noise will also be needed.
Link to order an LMK04800 Evaluation Board and Download the board instructions: http://www.national.com/pf/LM/LMK04800.html#Boards
Link to download CodeLoader (device programming) and Clock Design Tool (loop filter design & phase noise simulation) software: http://www.national.com/en/clock_timing/codeloader.html
If you'd like to discuss your application needs more specifically, you may verify this answer and we can discuss more directly via email if you prefer.
Best regards,
Alan
This is a old threat so I am not sure if it is still monitored...
I am trying to find the right chip to clock AFE5801 ADC. I am using a similar clocking scheme shown in AFE5805 datasheet fig. 90. The original clock is produced in the FPGA, which needs to be cleaned before going to AFE5801.
My application is a bit different in that it only needs 1 channel in AFE5801, so I don't need multiple clock outputs nor they don't need to be synced.
The datasheet shows CDCM7005 or CDCE72010 and the above posts suggest LMK04800... but I was wondering if there is any chip I can use that does not need an external VCXO just for simplicity... I am planning on using around 50 MHz sampling.
Thanks!
John
You may consider using LMK04906 (6-output dual loop jitter cleaner/clock gen) configured for Single Loop mode (PLL2+integrated VCO). You can use Clock Design Tool to enter a model of your input clock phase noise and simulate the output clock phase noise and RMS jitter performance for your application.
You may also consider LMK03002/C (4-output single loop jitter cleaner), but LMK04906 (in single loop mode) will have better jitter performance.
Regards,Alan
Hi Alan,
Thanks for the response! It's just what I was looking for.