I can't seem to get anything other than 0V from my SDout on the afe5808. I have a test that modifies reg2, sets the read bit, and tries to read back reg2. All I ever get is 0.
All the supplies are up and good. All the SPI signals look good. All the power downs and reset are low.
Here is my SPI transaction record:
3718.afe write-read reg2.xls
do you have a AFE5808EVM? we have read features on that EVM.
the below is your writing history. i think you need to specfy which address to read and set reg0
so you need to do something like
1. write a reg A with some content. when the chip is power up, most register bits are 0
2.set reg0 as 1
3 write the reg A address through regular SPI writing
4. Read from SPI SDOUT.
Yes, that's what that sequence is doing:
1. W 02 00 F8 write 00 F8 to reg 2
2. W 00 00 02 set the read bit reg0
3. W 02 00 00 write the reg 2 address
4. R 00 00 00 read back reg 2, still zeroes even though 00 F8 was written.
I'll try and set up an EVM and duplicate this sequence.
before you set up EVM, i think monitoring the SDOUT pin with a scope can help some. at least we should see some toggling on the SDOUT pin.
i assume you can power down the device trhough SPI registers. at least, this can ensure theSPI write has no issue.
Thanks! Happy New YEar!
I've been monitoring all the signals right at the part. They all do just what is expected except SDout which remains 0V always.
If I can't read an SPI port how will I know if I have powered down the device with an SPI command?
there are two ways to monitor:
1. check the power supply current.
2. if check current is not feasible, check the LVDS otuput pins. when the device is power donw, the LVDS data ports should have no data.
Sorry to not get back on this. I think we found our FPGA had the wrong pin type assignments in the constraints file and was driving the afe output back with another output. There is a series R at the afe output.
thanks David! glad the problem is solved.
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