Imaging

Forum Post: RE: AFE5808 part markings

LeonardEllis — Fri, 24 May 2013 15:15:00 GMT

Jamie,

Part marking does not reflect the silicon revision of the die. It only indicates assembly date, package type and assembly site. For the AFE5808, here is the part marking info:

If a released device undergoes a silicon revision, a PCN would then be issued, all users informed, and included in the PCN will be lotcode information, so the revision can be related to the date code on the marking.

-Leonard

Forum Post: RE: AFE5808A TEST MODE 5K-resistors accuracy ?%

csmyth — Thu, 23 May 2013 15:11:00 GMT

Cafain,

Sure, no problem.

Chuck Smyth

Forum Post: Time of Flight Chipset, OPT8140 / OPT8130, VSP5324 and OPT9110

Rak — Thu, 23 May 2013 15:04:00 GMT

Hi,

My customer is interested in TI's ToF chipset, OPT8140, VSP5324 and OPT9110.

The customer would like to know more details about the chipset solution.

* Can I get datasheet of these devices, OPT8140, VSP5324 and OPT9110 ?

* Could you let me know about the development tool for the chipset ?

* Can the chipset solution support VGA resolution ? Or, do you have roadmap for VGA support ?

* It seems that OPT9110 requires DDR2 memory for its operation. What size of DDR2 memory is required ?

* Are they any recommended spec / part for LED ?

Thank you in advance for your help.

Best regards,

Rak

Forum Post: RE: AFE5809EVM ON BOARD CLOCK @ 8MHz in CW mode?

Fabio Bucci — Wed, 22 May 2013 20:21:00 GMT

Hi Enrico,

please find below the answers: -

1. So, I must replace 2 osclillator and verify that the C26, C25, C27, C102 are installed, it's rigth?

That's correct. You need to replace OSC1 and X1 on the board making sure C26, C25, C27, C102 are installed and than you're supposed to get the 8MHz clock from J10.

Please keep in mind that the board is not meant to work in that way so we CAN'T GUARANTEE you can succesfully drive your ultrasound probe. J10 as well as J1 are meant to be input clock and not output clock in CW mode.

2. Could you explain to me, practically, the difference between ADC clock and CW clock?

The ADC clock basically sets the sampling frequency of the internal Analog to Digital converter and it doesn't do anything else - setting properly the board you can provide it externally using J15 or you can use the 40MHz onboard clock (U17).

The CW clock basically provides the local oscillation for the CW mixing and the phase delay.

They are different each other - if you use the AFE5809 in TGC mode than the ADC clock comes into play, if you use the AFE5809 in CW mode than the CW clock will come into play. Please keep in mind that the part can't work using both TGC and CW mode at the same time.

3. We have to use them both?

I would say that it depends on the application - if you are going to use both TGC and CW mode you must use both.

Just a couple of questions from my side:

1. What's the company you're working for?

2. What's the application you're working on?

As I can't provide any contact detail here, I would be grateful if you could post your email address or keep your e2e profile updated so that I can contact you.

Just let me know should you need any further support.

Regards,

Fabio

Applications Engineer

TI Healthtech/Imaging

Forum Post: RE: Need Help for Ultrasonic Imaging Applications of LM96570/LM96550/LM96530/AFE5805

SHIWEI WU — Mon, 20 May 2013 02:21:00 GMT

Hi Charles,

I am afraid that the demand of VSUB powered on firstly is NOT met strictly. All voltage supplies transform from the input power i.e. +/- 12V and +5V which are supplied simultaneously. So the power on sequence is depended on power chips. We are not realy sure!

Forum Post: RE: AFE5805 LVDS TEST PATTERNS and LVDS receive

haiteng wu — Mon, 20 May 2013 02:16:00 GMT

Hi,Chuck,

I use Altera IP altlvds_rx to receive lvds data from AFE5805, deserialization factor is 6, write the rx_out[5..0] into FIFO with rx_outclock(100M), and read from FIFO using 50M clock to splice a 12-bit data. Input some pulses on rx_channel_data_align[0] to realign byte order. I watch the FIFO output signal in Signal Tap, and the result is showed in the figure above. As you suggested, I try the toggle with two codes 0xAAA and 0x555, the phenomenon is the same. I also slow down the input clock of AFE5805 to 15M, there is still no improvement.

Thanks!

Haiteng

Forum Post: RE: LM96551

Charles Guan — Mon, 13 May 2013 15:26:00 GMT

Hi Gregorz,

Yes, something similar to what you draw.

Regards,

Charles

Forum Post: RE: About TX-SDK-V1 powersupply?

Fu-Sheng Jiang — Sat, 11 May 2013 16:20:00 GMT

Hi Charles,

I am very very thanks for your help. The power supply information is got by your document.I will try to setup .Thank you so much again.

Have a good time.

Fu-sheng

Forum Post: DRV201YMBR

jayaram boopalan — Sat, 11 May 2013 06:52:00 GMT

Hello,

we are using the voice coil motor (VCM),we intend to change the direction of the motor using driver, the part number of driver is "DRV201YMBR" , So please do inform is it possible to change the direction(To and fro) of VCM using the driver.

Regards

Jayaram

Mindflow Consultants

Forum Post: RE: Software/Disc for TX-SDK-V2/NOPB?

Charles Guan — Fri, 10 May 2013 15:51:00 GMT

Hi All,

Please download the software @ http://www.ti.com/tool/tx-sdk-v1

Regards,

Charles

Forum Post: RE: AFE0064 output current

Iolanda fuduli — Wed, 08 May 2013 00:22:00 GMT

Hi Nagesh,

thank you for your reply. Taking in account point 1 and 2 the linearity is ok. I am aware of the DDC264 and I am already using the evaluation board; only problem is that we do not have a facility to do assebly of the board and since the DDC264 cannot be hand solded we use the AFE until we can acces to a pick and place. Anyway, our application is suppost to measure charge packets, the linearity I was doing it is just a characterization of our data acquisition system.

Regarding the failure, I am sure I didn't exceed neither the Abs max ratings nor 10mA per pin but the chip I was testing doesn't work anymore: EOC is always low, the voltage at the input pin is about 0.1V and the output is stuck. Maybe it was just a weak component...

Thanks anyway,

best regards

Iolanda

Forum Post: Software/Disc for TX-SDK-V1?

Fu-Sheng Jiang — Tue, 07 May 2013 11:19:00 GMT

Hi,

I am davinciJ. There is no driver and software in TX-SDK-V1 EVM kit.

And the TI sales said pass a link to download,but not yet recieve.

Could you help me to deal with this problem?

My Email :davincij2010@gmail.com

Thanks so much~

Forum Post: RE: functioning of LM 96570

Mariusz Hajduk1 — Tue, 07 May 2013 11:12:00 GMT

Hi Shiwei,

No problem, I will send you the software within a few minutes. Anyway, you can use it free also for commercial purposes. I'll be glad if it could be somehow helpfull.

Regards,

Mariusz

Forum Post: RE: Questions about TX-SDK-V2 EVB

Charles Guan — Fri, 19 Apr 2013 15:53:00 GMT

Hi Valeriy,

I wouldn't recommend you to use a voltage divider to generate the +/-40V. You have to build a completely separate power supply for +/-40V. Depending on your operating frequency and mode, current consumption can be as high as 150mA on VPF & VNF. If you don't want to generate supply for VPF & VNF, you can use the LM96551, which generate VPF & VNF internally. Please keep in mind that the current consumption that Rohit provide in an earlier post are when there are no input signals. Please tell us more about your application so we can provide more accurate numbers for you.

Regards,

Charles

Forum Post: RE: Minimum number power supply to LM96551

Rohit Bhat — Tue, 16 Apr 2013 16:40:00 GMT

Dear Samir,

0.1uF bypass capacitor between VPF --> VPP & VNF --> VNN is ok if operating the LM96551 with MODE = LO.

But, it is recommended to add an additional 10uF between the pins if operating the LM96551 with MODE = HI.

I would suggest using the combination of 0.1uF+10uF or 0.1uF+1uF+10uF between the pins to provide urself more flexibility. Make sure the voltage rating for the capacitors is around 100V as well.

I think Charles was also suggesting the same in the link:

http://e2e.ti.com/support/other_analog/imaging_afes/f/239/t/226250.aspx

I hope that helps.

Thanks,

Rohit

Forum Post: RE: FPGA TTL signal amplification with LM96551 and Pulsing ultrasound transducer

Rohit Bhat — Mon, 15 Apr 2013 17:28:00 GMT

Hi Samir,

I think I tried answering to your previous post. Please let me know if you need more information.

I will try to help you as much as I can.

Thanks,

Rohit

Forum Post: minimum voltage/power to VPF (8,53 pin) and VNF (10,51 pin ) pin of LM96551

Samir Kumar Biswas — Mon, 15 Apr 2013 08:59:00 GMT

Dear all ,

Planning to use FPGA NI 5752 TTL signal and amplifying it with LM96551 for pulsing ultrasound transducer. I need four power supply such as VDD/VDN= +/- 10V , VPP/VNN = +/-50V, VSUB= -55V and VLL=+5V and there are another two floating power supply VPF = VPP-10V and VNF=VNN+10V. Anyone has any knowledge of minimum voltage or power to VPF/VNF. sharing previous working knowledge will be more helpful. Or any suggestion is most welcome.

Waiting for your kind reply and help

Forum Post: VSP5620/VSP5621/VSP5622/ datasheet remarks

Lucas Kociszewski — Wed, 10 Apr 2013 13:29:00 GMT

Hello,

I found some mistakes in VSP562x datasheet (16 bit 4 channel, CCD/CMOS Sensor Analog Front End With LED Driver) , I have signed NDA for this product.

In document there is no explanation of CLK_CFG4 register (Clock configuration 4).

In addition there is no information about Clock configuration 3 register (neither in the register map nor register definition), but Clock configuration 2 and 5 registers exist.

Where I can get the latest version of this datasheet? I wrote to asktexas@ti.com but they redirected me here.

Thanks in advance

Forum Post: RE: single channel ultrasound?

Calum Mackinnon — Tue, 09 Apr 2013 18:40:00 GMT

Hey Guys,

Thanks for the options however do you have a ref design or options for the other blocks, PGA, amps, etc.

Cheers

Calum

Forum Post: Ho can I connect a 12-pin CMOS sensor output to the 27-pin ISP header TMS320DM642?

Belen Rubio — Sat, 06 Apr 2013 19:36:00 GMT

Hi, I'm trying to connect a 12-pin output cable form CIS scanner sensor to the header TMS320DM642. Is it possible?

I don't have access to the specifications of the CMOS sensor (scanner) since it is kind of a hack, would it make sense to think that this 12-pin flex cable follows a standard order? Which options do I have to make this connection happen? Any recommendations? Thanks.

Imaging

Forum Post: RE: AFE5808 part markings

Forum Post: RE: AFE5808A TEST MODE 5K-resistors accuracy ?%

Forum Post: Time of Flight Chipset, OPT8140 / OPT8130, VSP5324 and OPT9110

Forum Post: RE: AFE5809EVM ON BOARD CLOCK @ 8MHz in CW mode?

Forum Post: RE: Need Help for Ultrasonic Imaging Applications of LM96570/LM96550/LM96530/AFE5805

Forum Post: RE: AFE5805 LVDS TEST PATTERNS and LVDS receive

Forum Post: RE: LM96551

Forum Post: RE: About TX-SDK-V1 powersupply?

Forum Post: DRV201YMBR

Forum Post: RE: Software/Disc for TX-SDK-V2/NOPB?

Forum Post: RE: AFE0064 output current

Forum Post: Software/Disc for TX-SDK-V1?

Forum Post: RE: functioning of LM 96570

Forum Post: RE: Questions about TX-SDK-V2 EVB

Forum Post: RE: Minimum number power supply to LM96551

Forum Post: RE: FPGA TTL signal amplification with LM96551 and Pulsing ultrasound transducer

Forum Post: minimum voltage/power to VPF (8,53 pin) and VNF (10,51 pin ) pin of LM96551

Forum Post: VSP5620/VSP5621/VSP5​622/ datasheet remar​ks​

Forum Post: RE: single channel ultrasound?

Forum Post: Ho can I connect a 12-pin CMOS sensor output to the 27-pin ISP header TMS320DM642?

Forum Post: VSP5620/VSP5621/VSP5622/ datasheet remarks