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Part Number: LM5175
My customer has some serious problems with the LM5175 which thy need to clarify before production. Instability in the Evaluation Boards and excessive Standby Current. They have oscilloscope plots which will clarify the problems.
]Customer already laid out a PCB in anticipation of using the LM5175 in quantity and purchased a couple of evaluation boards (TPS25740BEVM-741 and TPS25740EVM-741) to give them a run beforehand. Problems with both evaluation boards became apparent when testing for STANDBY Current Drain. Three Oscilloscope Plots are attached and I will explain each. Basically both boards were operated with no load and default to 5Volts out. The input voltage was not below 12Volts so the boards were in Buck Mode for this test.
The oscilloscope points are the Gate Drives for incoming Hi and Lo FETs. From the evaluation schematic these are designated HDRV1_P and LDRV1.
Plot#1 has 22Volts input and is drawing 2.0mA. The input voltage can be slowly reduced to 12Volts and the board still draws about 2.0mA and appears stable - with some ringing.
However on Plot#2, on the same board, the input voltage was briefly removed and reinstated. The board immediately became unstable and would not recover stability until the input voltage was increased to 20.88Volts. In this state, at 12Volts the current drain was around 18 to 20mA on several tests. As the input
voltage was increased, the current drain reduced slightly but suddenly dropped at 20.88Volts on all tests.
Plot#3 is the second Evaluation Board with 12Volts input and no load but it draws 30mA. This is constant and indicates a fault. In an effort to isolate the fault condition, I removed Q6 and R33 but the current drain remains at 30mA and the waveform is constant i.e. no idle periods for a no load condition.
Can you advise as to what no load current drain we should expect?
The files are attached as pdfs and Picoscope data files
I will send those 6 files attachments in separate message.
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In reply to Youhao Xi:
Hi Naser and Youhao,
We believe the above issues relates to emails we have been sending to TI support, but haven't yet received satisfactory responses.
For the TPS25740BEVM-741 this was originally setup in DCM anyway.
We still find that there is no load instability. The first plot shows HDRV1_N and Gate of Q4 when 22V is applied and slowly reduced to 12V. In this case the input power is ~2mA which is good.
However if 12V is applied directly from startup the same signals look very different and the standby input current is around ~20mA and clearly not stable.
Any advice on this issue would be most appreciated so that we can move forward on this design.
Tim and Peter
In reply to TimS:
Further to the above. We have further plots on the TPS25740BEVM which I think you will find very interesting. The plot with file name ending with #1 ( see this plot first ).Channel 2 shows the incoming side of the inductor with channel 1 on the low side gate. This gate drive looked O.K. but the two distinct oscillations on the inductor indicated that something unwanted was happening on the outgoing side.
Plots marked #2 and #3 again shows channel 2 on the incoming side of the inductor but channel 1 is the high side gate drive of the outgoing voltage. It is clearly switching OFF when it should be firmly ON in buck mode. The low side gate drive was always low as it should be and showed no signs of false turn on.
These plots are 12 Volts in when switched in rather than starting at a higher voltage and slowly reducing it to 12Volts. The output is always set to 5 Volts on the feedback divider. As you requested, a load was placed on the D.C. out which we set at 0.5A. The output voltage regulation is erratic and the input current drawn could not be accurately determined. As in previous plots sent to you, the FET Q6 was removed to isolate the type-C components and the board left in DCM mode.
Any and all feedback on these issues would be most appreciated to continue using these TI products.
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