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BQ34Z100-G1: BQ34Z100-G1

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Replies: 27

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Part Number: BQ34Z100-G1

Hi,

Procedure followed and report attached of Learning cycle.

Gauge: BQ34Z100-G1

ChemID: 6112

Cells: NiMH, 10S configuration, BK220SCHU.

Report of learning cycle is attached.

 Document followed: SLUA903 (July 2018) – Achieving the successful learning cycle.

 Document attached in the community: SLUA777 (June 2016) – refer to BQ28Z610/BQ78Z100, so its not same as the BQ34Z100-G1, changes specs, changes registers and bits.

The short procedure for learning cycle,

  1. Discharge battery to empty
  2. Relax for at least 5hours
  3. Charge battery to full
  4. Relax for at least 2hours
  5. Discharge battery to empty
  6. Relax for at least 5 hours
  7. Generate the golden imageProcedure and report of learning cycle.docx

7128.Learning Cycle.zip

Thanks in advance!!

  • In reply to Batt:

    Hi Batt,

    I look forward to receive your feedback!!!

    Info,

    1. In BQ34Z100-G1, In which phase the FCC updates?
    2. During the Lifetime, practically FCC will be decreasing and how it is Characterized during the lifetime? when does the BQ34Z100-G1 Updates FCC and how it is characterized?

    Thanks in advance Batt!!

    Regards,

    Red.

  • In reply to REDDY:

    Hi Reddy,

    1. FCC will update at each grid point during dsg. To understand it better, please see 

    2. You can see how FCC varies as the battery ages by monitoring the state of health. The SOH is a ratio of FCC to design capacity. As FCC decreases, so does SOH. When a battery is new FCC will be nearly the same as design capacity. As it ages, as the internal resistance increases, FCC drops. Therefore SOH also drops.

    Regards,

    Batt.

  • In reply to Batt:

    Hi Batt,

    Any Updates It's been long time waiting for the feedback from you!!

    Thank you!!

    Regards,

    Red.

  • In reply to REDDY:

    Hi Red,

    It appears Batt has fully answered the question.  If this is true, please click on the green 'resolved' button to make this post easier to find for others with a similar issue.

    Sincerely,

    Bryan Kahler

  • In reply to Bryan Kahler:

    Hi Bryan,

    I didn't receive any updates for the 08 October 2019 post. For reference I'm posting it again.

    ******************************************************************************************************

    Hi Batt,

    1. Started learning cycle, the problem with Learned status has not been resolved and im not seeing the update of learned status. when i'm going through the log, the qmax passed q update is noticed. I'm attaching the log of learned status from step 1 to step 4 (DSG, relax, chg, relax). please go through it and let me know, whats the problem and why its not updating. (Log: LC.log)


    Step 1 : DSG: IT_EN, RESET, C/5= -400mA, Learned status 0 to 4.

    Step 2: Relax: RUP_DIS goes low, OCVTAKEN and FIRSTDOD, Qmax update

    Step 3: CHG: FC high.

    Step 4: Relax: OCVTAKEN, Qmax update, Learned status didn't change from 4 to 5.

    2. May I know when does the Full Charge capacity will be updated during the learning cycle, i mean in which step of the learning cycle?

    3. Please go through the  data memory xlsx file attached and try to suggest the values. Because not convinced about what you are trying to tel apart from -deltaV values, and thanks for info.  Actually I was running the test with 30mV/10sec, I thought 10 sec sample time would be sufficient. I will consider 10mV/16sec in the next test.(0143.5635.8322.Dm001)

    The table attached here is the information which you shared in the previous post (referring to point 3 in this post )

    • Pack configuration B : default value is af, our value is a9. Here you mentioned "don't change reserved bit", In the default value the reserved bits are not set.
    • Pack Configuration C: lets consider b5, it states relax_jump_ok and smooth bits are set. where as the datasheet states those two bits depends on smooth flag, on other hand the smooth bit is set, also the default value 37, here all the three bits are set.

    Not really convinced about what you are trying to tell about Pack configuration.

    Configuration Registers Pack Configuration B af a9 f9 don't change reserved bits flags
    Configuration Registers Pack Configuration C 37 b7 b5 don't set smooth and jump enabled flags


    7230.LC.log

    5722.4101.0143.5635.8322.Dm001.xlsx

    Thanks in advance batt!!

    Regards,

    Red

    *********************************************************************************************************************************************************************************

    Thanks in advance Batt and Bryan!!

    Regards, 

    Red

  • In reply to REDDY:

    Red

    Your log files does not have the complete cycles. Since I am just now jumping into this, We may have to start over just to make sure you haven't missed anything obvious.

    1. What chem id are you using? What kind of cell is this? Did you identify your cell trype using our online tool gpc chem?

    .2. For your charge and discharge profile, i would recommend you use a constant current. Also when charging make sure to to properly taper and meet all the taper conditions .. From looking at your file, i do not see a taper condition

    3. pls reference this document and make sure to complete two cycles.

    if it fails, address my questions and send over the gg and log file.s

    thanks

    Onyx

  • In reply to Onyx Ahiakwo:

    Hi Onyx,

    Thanks for your reply.

    1. Battery specs:
      1. NiMH - BK-220SCHU
      2. Nominal Voltage: 1.2V
      3. Nominal Capacity 2200 mAh
      4. Battery Pack Config: 10S
      5. ChemID: 6112, obtained using Ti online tool gpc chem 
    2. Taper current condition:
      1. DSG: here C/5 condition has been used, when pack reaches 10000 mV, the termination has been done
      2. CHG: Constant current (around 950 mA) 
      1. Configuration,"Charge Termination","Taper Current","150","mAmp"
      2. Configuration,"Charge Termination","Current Taper Window","40","Seconds"
        1. It means during the charging when the current goes below 150 mA, wait for 40seconds and stop the charging phase.

    • Two cycles: If i'm not wrong we need to perform steps from 4.2.1 to 4.2.6 (in the last attachment) twice!!

    If wrong please address my point in this post, also please go through the Data memory and correct me if there is something wrong (gg file attached below)

    5611.main_dm_v01.gg.csv

    Thanks in advance!!

    thanks

    Red