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Part Number: TPS659039-Q1
My customer has some questions about the power sequence of tps659039, please help check:
1. Xi-osc0 powers up 6.6ms ahead of vddshv8, which is different from the required power sequence? Is there any risk and how to improve?
2. Similar issue for vdda-rtc and vdda-abe-per, the actual test show that vdda-abe-per is 0.58ms ahead of vdda-rtc.
OTP version is O9039A387IZWSRQ1. Thanks
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In reply to Dongbao Zhou:
--------------------------------------------------For more information on Multi-Channel Power Management ICs: http://www.ti.com/pmic
Find the right power solution for your processor or FPGA: www.ti.com/SoCPower
In reply to Nastasha:
Thanks for your reply.
I just upload the wrong one for the first picture, i am sure they follow the recommendation, and it has no problem for the processor. However, the test results have some difference.
As described in the DATASHEET: xi_osc0 can be turned off anytime after porz assertion and must be turned off before vdda_osc voltage rail is shutdown
The crystal signal xi_osc0 is controlled by the PMIC input power supply vdda_osc, but as the power-up sequence in DATASHEET，xi_osc0 is delayed after a long time after vdda_osc is turned on.
In reply to user3378603:
This is not part of the TPS659039-Q1 datasheet. I am moving this thread to the processor forum.
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