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TPS23754: TPS23754EVM-420 EVM

Part Number: TPS23754
Other Parts Discussed in Thread: , PMP11254, TPS23751

Dear Sir, 

I want to re-design a fly-back POE circuit of TI SLVU301.pdf(TPS23754EVM-420 EVM).

Vout=5V => 12V , Fsw=250KHz => 480KHz, Could you teach me where components need to chamge??

BRs,

Gordon Liu 

  • Hi Gordon,

    For Type 2 applications and at higher output voltages like 12V output, we find that the diode rectified flyback is the optimal converter for cost/efficiency (a synch flyback will have a similar performance for 12V output).

    I recommend looking at the PMP11254 below which is a known working solution. It uses the TPS23751; however, if the TPS23754 is required, you can use the same power stage.

    Thanks!

  • Dear Sir,

    Thanks for your respones quickly.

    I'm studing the the PMP11254 (tidrlp7.pdf) but I have some confuse on it.

    1: L3=L4=300 ohm, What're use for it?? It cause to the bad power efficiency; does it right??

    2: Fsw=250KHz => 480KHz, except Rt=34K=>26.9K, what components I need to change?? 

  • Dera Sir,
    I find out TPS23751 don't have Gate-2 pin so that it can't suppress the spike current.
    TPS 23751 don't have good EMI performance; Does it right??
  • Hi Gordon,

    1. L3 and L4 are ferrite beads to help suppress EMI. The 300 ohms is the peak impedance at a certain (high) frequency to mitigate EMI. I recommend looking at their impedance curves on its datasheet. Also, the resistance at DC is low so the efficiency hit is minimized. I recommend looking at the efficiency graphs on the test report as it shows high overall efficiency (88-89% with PoE).

    2. I recommend reviewing the app note below. This goes over in detail on how to design a diode rectified flyback converter including component calculations. This will let you know which components need changing for higher frequency converter. Note that for efficiency we find the ~250kHz is optimized and for higher frequency you may have more switching losses.

    3. The PMP11254 uses a RCD clamp to clamp the primary FET spike from the leakage inductance of the transformer. Note you can also slow down the primary FET with the series gate resistor. Lastly, EMI is also dependent on layout. Please see below app note that describes this in detail.

  • Dear Sir,

    Thanks for your response.

    At First, the slva305c.pdf is great design document for the fly-back topology.

    I have re-calculate evry component of slva305c.pdf but the I don't get the same result on Cctl.

    I guess it cause  by the image part issue of Imps(2.9.2).

    Kmps=4.66;  W_rhpz=133904(21322Hz), W=34540(5500Hz); Imps=Kmps(1-Wj/  W_rhpz).

    Could I merge  real part + image prt to the magnitude?

    And then Could you sahre the similar document for the forward topology?

    BRs,

    Gordon Liu  

  • Hi Gordon,

    The magnitude should be the square root of the real part squared plus the imaginary part squared.

    For the active clamp forward topology, I recommend looking at the app note below.
    www.ti.com/.../slua535.pdf

    Thanks!
  • Dear Sir,

    Thanks for your responses quickly.

    I try to calculate the equeation-38(CCTL) of Slva305C.pdf but I's not work.

    Please check my value setting, which one is error??

    R_ctl=2000; R_ob=405; CTR_2ma=0.84;  Kctl=2; Gmo=0.65;

    MPF(w)=0.886; 

    Imps_w=4.81(Magnitude); Kmps=4.66; w=34540(5.5KHz); w_rhpz=133904(21.3KJz);

    Zout=0.18;  Rload=1.53ohm; Cout1=47uF; Cout2=87uF; Z_cout1(w)=0.615; Zcout2(w)=0.33

  • PS: If it's OK, Could you ahre your EXCEL file of Slva305C.pdf ??
  • Hi Gordon,

    I will send a friend request and we can discuss this offline. Thanks!

  • I have accept the request.
  • Hi Gordon,

    Thanks for accepting; I have attached the original file in private message. Thanks!