• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 62 subscribers
  • Views 210 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

BQ24195: Can OTG pin be pulled up to REGN pin?

BQ24195: OTG pin high and VBUS_STAT = 01 (USB Host) does not always give 500mA IINLIM

Fred Archer
Prodigy 60 points
Part Number: BQ24195

I am having trouble with the default IINLIM setting of the BQ24195. It seems not always to follow the truth table described in the datasheet (Table 2)

For this test I have D+ and D- tied to GND through 15kohm resistors always. The REG08 always reports back VBUSTAT = 01 (USB Host) - No Problem.

I have OTG pin pulled high to Vsys (via 10kohm resistor with 100nF bypass cap)

When I have no battery connected to the system and simply switch on the external power supply, the current limit gets set sometimes to 100mA, sometimes to 500mA (Confirmed by reading REG00 and looking at my power supply output current)

When I get into this state, I can toggle the OTG pin but there is no change to the current limit. (in spite of the fact that VBUSTAT = 01 (USB Host) always). If I trigger a DPDM again via REG07:DPDM_EN, the current limit will then follow the  OTG status (at the time of triggering the DPDM) subsequently changing the OTG does not seem to change the current limit.

Is the input current limit as set by table 2 determined only at the point of DPDM detection (i.e. power on and register change) or should it follow my OTG pin?

Secondly it seems I may have a race condition here. The OTG I see now is pulled to Vsys with 10k and has a 100nF capacitor, which will give a time constant of only 1ms. Could that be enough to explain this behaviour? I wouldn't think so. Surely the time it takes to get the power good signal and perform DPDM.

If I have a battery connected I do not see this problem. 

When I have a charged battery connected the Vsys will be high before I connect the VBUS so the OTG will be pulled up before the DPDM is triggered - this leads me to believe it is a race condition,.

We dont have a normal use case where no battery is connected but in case of removal inadvertently or in case of dead battery I assume the same problem will occur. In this case with 100mA I cannot assure that the host MCU will have enough current to get out of reset to change the settings.

Thanks

Fred

  • 0
    TI__Mastermind 25800 points
    Hey Fred,

    Because you have no battery present and because the DPDM detection takes place before the converter tries to regulate SYS (and only then), your pullup rail (VSYS) is not present to drive the OTG logic during the input detection.

    Changing the state of OTG does not toggle the input current limit unless, like you mentioned, you flip the DPDM_EN bit. Then the charger reruns that initial detection. However, that this point the SYS output is already present and pulling up on the OTG pin.

    You can test this by using an external supply to pull OTG high rather VSYS and see if you ever read 100mA input current limit.


    Regards,
    Joel H