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# [FAQ] TPS63020: Phase margin improvement method

Part Number: TPS63020

Hi,

I am troubled that the phase margin of TPS63020 can only be about 30 deg.

Please tell me how to improve the phase margin.
Also, please tell me how much phase margin is required.

Best Regards,

Hasegawa

• Hello Hasegawa,

In general for a converter that has everything but the inductor, capacitor and resistor divider implemented, 30 deg is normally a good enough number, even if some customers prefer 45 deg.

Normally the phase margin should increase when adding additional capacitance on the output. A feedforward capacitor might increase the phase margin as well, but this is dependent on the other used components as well.

In general as the device is operating in buck, buck-boost and boost mode as well as in pulse frequency mode, measuring the phase margin is maybe as well misleading. You need to make sure that the component stays in the same mode throughout the whole measurement, which is especially in the buck-boost region hard to achieve. In general some load transient measurements give a good indication on the phase margin, I think. In addition, this is most of the time closer to the application than the small signal result of the bode diagram.

Which components did you use for your tests?

Best regards,
Brigitte

• Hi Brigitte-san,

I understood that there is no problem even if the phase margin is 30 degrees.

It is a question.
1)Where should I connect the feedforward capacitor?
2)What is the minimum value of phase margin?
For example, is it okay at 20 degrees?

-----------------------------------------------
The components of my test are:

The schematic configuration is the same as Figure 7 Application Circuit in the data sheet (Rev. G).

R1 = 100kohm
R2 = 10kohm + 150ohm
C1 = 10uF x 2
C2 = 10uF x 3
C3 = 0.1uF
L1 = 1.5uH

Vin = 5.4V
Vout = 5.43V

The phase margin was measured with the FRA5097, adding 75ohm between R1 and Vout.

Best Regards,
Hasegawa

Hello Hasegawa,

Please be aware of the following recommendation from the datasheet: The recommended nominal output capacitors are three times 22 μF.

You are using 3 times 10uF which is lower than the recommendation causing most probable the low phase margin.

In addition, it is possible that the used MLCCs do not even get close to the value written on the datasheet. Please check out the so-called DC Bias of the capacitors. MLCCs loose capacitance when used at a DC level. For example, if you are using 6.3V rated capacitors at an output voltage of 5.4V they could get down to 20% of their capacitance or even lower.

Some more detailed information about phase margin measurements:

Phase margin is needed because of the following reasons:
1. Time for the control loop to get back into default regulation value after a disturbance (at 45 deg the load transient response shows one undershoot one overshoot (or vice versa) and the default value is reached fastest according to regulation theory).
2. To keep the system stable even if the components change over time.

The second point is the one that is more unknown and therefore in depth knowledge of the system is necessary to know how much phase margin is ok for the system lifetime.
As the amount of different components on a converter (with all switching components integrated) is low, experience says that 30 deg is in such systems very often good enough over lifetime.

To distinguish if the stability in your system is good enough, please have a look at the worst case load transient response in your system. If this is ok and still has some margin to the system requirements, it should be a stronger decision point than phase margin. Normally small signal disturbances are causing less problems in systems than large signal disturbances.
Especially when you measure phase margin with 5.4V input voltage and 5.43V output voltage, TPS63020 is permanently changing from buck mode to boost mode and back, because you are in the region where the converter changes modes. Therefore you have during a small signal measurement a large signal change, so the measurement result is not very accurate.

So I think for your system it is important to do worst case load transient measurements. Worst case can be on the following points:
mode transition boundaries (buck to buck-boost and buck-boost to boost)
highest and lowest VIN (often the lowest VIN is worse)
highest load transient with fastest slew rate
lowest temperature (because the converter normally reacts faster at low temperature)

Best regards,
Brigitte