Hi,
In some cases, the external components output capacitor Cout, inductor L, feedback resistors are well selected based on the recommendation of TPS61022 datasheet. However, the output voltage would drop at heavy load current or IC failed frequently, SW was found short to GND. How to avoid it?
Dear All,
TPS61022 is a high switch current, integrated boost converter. Layout is an important design step. If the layout is not carefully done, the regulator could suffer from instability and noise problems. Minimize the length and area of all traces connected to the SW pin, and always use a ground plane under the switching regulator to minimize interplane coupling.
The most critical current path for all boost converters is from the switching FET, through the rectifier FET, then the output capacitors, and back to ground of the switching FET. This high current path contains nanosecond rise and fall time and must be kept as short as possible. Therefore, the output capacitor not only must be close to the VOUT pin, but also to the GND pin to reduce the overshoot at the SW pin and VOUT pin.
For more detailed information, please refer to part 10 Layout of TPS61022 datasheet.
IC failure could happen if the output low ESR ceramic capacitor is not placed very close to Vout pin and GND pin. By optimizing the layout, the issue could be fixed. Here is one case on E2E that proves it: https://e2e.ti.com/support/power-management/f/196/p/861563/3215362?tisearch=e2e-sitesearch&keymatch=tps61022#3215362
