Part Number: BQ25890
I'm using the bq25890 in my design to charger a 7200mAh battery. In charge mode, my device is failing radiated emission test, and the source of the emission ihas been narrowedd down to the charger IC. Unfortunately this IC does not give enough flexibility to play with the settings (like gate driver slew rate control, etc)
I'm charging at a rate of 3.5A using a quick charger IC that provides a 11.5V @ 1.5A.
The device is charging through USB via a wall wart charger (quick charge)
As with all buck converters, input capacitor placement is critical to lower EMI. Placing C172 as close as possible between PMID and GND and/or adding a small decoupling capacitor (0.01uF to 0.1uF) usually mitigates EMI. If not, then adding a properly sized RC snubber from SW to GND will mitigate EMI at the expense of efficiency. Attached is a document the further explains these recommendations.bq2589xbq2419x_29xlayoutandEMIrecommendation.pdf
In reply to Jeff F:
I have some questions about some the app note as well as my system response. I notice something strange happenning on the switch node. SW_OUT (on my schematic). There is no visible ringing (no overshoot on the rising edge) but there is ~1V undershoot on the falling edge. The strange thing is that the undershoot is held low for some time before recovering, but then right before the start of the rising edge it drops again by approximately the same voltage. The question is why is it behaving like that. I have never seen this. Could this have anything to do with Low side power FET parasitic capacitance ?
YEL: input current
I also see some high frequency switching on my input voltage that decoupling capacitors do not seem to remove. I placed a 1nF cap across the 1uF cap on VBUS. The oscillation frequency of that high switching noise is ~230MHz. Do you normally recommend using an LC filter to keep that noise from migrating to the USB charging cable and radiate or you have a different take on it.
RED: VBUS voltage
My last question is out of curiosity:
How is the switcher being regulated? I don't see on the block diagram on page19 of the datasheet where the error signal is being sensed and how the control loop operates.
Thanks again for you help.
In reply to user4300350:
Yes, i forgot to mention the oscillation in my previous poIt because i was able to mitigate that with a 10uF on PMID (see screenshot below) I also got similar results adding the same capacitance to VBUS. That being said, from a USB compliance prospective the added capacitance can be an issue (higher inrush current upon insertion of USB, etc) but between VBUS and PMID where do you recommend placing this additional capacitance to lower this oscillation.
How to do prefer i send you the layout. A 2D screenshot may not give you a good idea of placement.
BOTTOM and power plane with copper pour for VBUS
Jeff, I still haven't gotten an answer about the behavior my switching node is seeing (described in May 19 post), Any thoughts on what's going on there ?or the idea about the LC filter on the input as a way to reduce our switching noise.
Also what about the idea of adding an LC filter on the input as a way to reduce our switching noise. What type of care should I take to ensure my LC filter doesn't affect the switcher stability. What's the input impedance at VBUS ?
I have never seen this charger oscillate in my 3 years of supporting of it. Can you send the register settings when you see this oscillation? In the past with other chargers, adding an LC on the front end usually caused oscillations. Like any buck converter, the input impedance at VBUS is negative resistance. I will ask if design has characterized it.
Is register 13 bit 7 reporting that you are in VINDPM? If so, if you change your input voltage or change the VINDPM using the Force VINDPM bit (register 0D bit 7) and then changing the value (register 0D bits 0:6), does the oscillation go away? Regarding your layout, the single via for PMID from top to bottom is adding a lot of resistance and inductance. That capacitor is the input to the buck converter and so sees large current spikes.
In our current layout, the analog and digital ground are not separated. We are connecting all pins to our system ground. I know the datasheet example block diagram show separate grounds. I'd like to know whether that's necessary?
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