This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Bq24251 charger detection

Other Parts Discussed in Thread: BQ24251

Hello,

we have a design with Bq24251 and MCU. Both parts are connected to shared USB bus. When USB cable is plugged in, first, MCU writes this to Bq24251:

 Register2.Reset = YES;

 Register2.IIN_ILIMIT = ILIMIT_USB2_100MA;

 Register2.CE = YES;

 Register2.HZ_MODE = NO;

 

 Register1.WD_EN = NO;

 

 Register5.DPDM_EN = YES;

 Register5.LOW_CHG = NO;

 Register5.VINDPM = VINDPM_160MV;

 

It should reset Bq24251, do some default setting and initiate charger detection (DPDM_EN). However, when Register5 is read back, DPDM_EN is always set to 1, i.e. it never clears to 0 indicating charger detection was finished. MCU enables its USB transceiver at the moment charger finishes its charger detection proccess (so in this case never). What the problem can be?

 

Thanks

  • Hello Martin,

    The DPDM bit will automatically reset to 0 after the USB detection is finished. I verified it on bench with our EVM today. Can you let me know which USB port the device is detecting when this happened?

    When USB power source is plugged in, the IC will automatically initialize USB detection and the whole detection will take 700ms. Therefore, MCU can also wait 700ms before enabling the transceiver.

    Thanks,

    Wenjia

  • Hello Wenija,

    it happens on SDP and Apple/TT or non-standard adaptor. I can't test it on DCP and CDP ports. After writing the registers as described in my first post, I read 0x1A all the time from Register 5 indicating detection still in progress.

    Martin

  • Hi Martin,

    I was able to recreate what you saw. While I'm still looking into this, can you confirm that when this was happening, your battery voltage is below 3.4V? Also, can you read back the bit4 of register#7 "CLR_VDP"? It stays "1" on my bench and I'd like to check if it is the same in your case.

    Thanks,

    Wenjia

  • Hi Wenija,

    I can't see any dependency on the battery voltage. It happens all the time.

    And yes, I can confirm, that CLR_VDP is 1 all the time, even when I write 0 to it.

    Martin 

  • Martin,

    I verified again with the EVM, I couldn't re-produce the issue with VBAT>3.4V. DPDM_EN will clear itself about I forced '1' to it.

    In the digital block of this device, VBAT > the battery good threshold (which in this case 3.4V) is one of the necessities to trigger the signal for USB detection done. This correlates with what I observed: if VBAT <3.4V, DPDM is not reset to 0.


    Thanks,

    Wenjia

  • Dear Wenija,

    thanks for your response. Can you please give me a reference where the requirement of VBAT > 3.4 V for charger detection is stated?

    What's the purpose of this requirement?

    Thanks

    Martin

  • Hi Martin,

    This is not specified in the datasheet but it is how the internal digital works for this device. 3.4V is a safe voltage above which the high charge current can be applied for most of the batteries, and that is why it was defined this way initially.

    Again, the USB detection will take up to 700mS, so you can use it as a reference to send the command to the MCU.

    Thanks,

    Wenjia