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bq24725a smbus problem

Other Parts Discussed in Thread: BQ24725A

Hi,

I am using BQ24725A IC as a SMBus slave. Just after sending SMBus Start condition i am getting Timeout event. Also slave device is not acknowledging after sending its slave address that is 0x12H (0x24H in Data register). Can any one suggest what kind of issue is this? I have tested the same code on other SMbus slave device and that is working fine. Can any one suggest what might be issue? Or do any one have SMbus configuration code written for BQ24725A? 

Please help.

  • Do you have a SCL and SDA waveform?  Also, to compare with a normal SCL and SDA waveform, please send a same command from bq24725A GUI software to EVM.

  • Hi Wang,

    I have tested the timing waveforms generated by Master using a logic analyzer. Below is the snapshot when Master device is sending a write command to slave(slave address = 0x12H) at 100KHz. From figure it is clear that slave is not acknowledging. Master is sending start condition and slave address( i.e 0x12H<<1 = 0x24H in data register) at bus and SDA remained high at 9th clock cycle.

    Here it is the Slave read command send by master...

    This BQ24725A IC is not acknowledging after Host is sending first byte that is its address(7-bit addressing) following start bit.

    Either there is any hardware fault or software error. I want to make sure that it is at software end or not.

    In the datasheet address of slave(BQ24725A)is mentioned as 0x12H and I am using 7-bit addressing.

    After Start bit when I send the address of slave on the bus setting LSB for READ i.e. setting LSB = 1, I transmit byte 0x25 (0010 0101), slave is not acknowledging.
    Similarly when I send the address of slave on the bus resetting LSB for WRITE i.e. resetting LSB = 0, I transmit byte 0x24 (0010 0100), in this case also slave is not acknowledging.

    Also i am receiving Timeout event at Master Status register.

    Please assist if I am doing any mistake here?