This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

BQ24257 Vbatreg

Other Parts Discussed in Thread: BQ24257, BQ24251

Hi,

I'm using BQ24257 to do battery charging. I have the following questions

1. I'm trying to use VBatreg of 3.66V to charge a battery, but when a battery disconnected fault is detected, i can see that the value is resetted to 4.2V(default). Is this normal? is there a way to stop it from resetting to default?

2. When there is a multiple fault occurs, which fault will be shown? by reading the fault bit, will it clear all fault or it will then show the next fault?

3. What is the difference between (stat  =  normal, fault  =  batt disconnected) and (stat = fault, fault =  batt disconnected) ?

4. what is the minimum  and maximum time for the chip to determine the USB port detection? 

5. If i disable Watchdog, will the IC still jumps back to standalone mode if there is no I2C communication?

6. If I communicates to the BQ via I2C once, does this mean it will stay as host mode until power cycle?

Sorry for the long list. Thanks in advance. 

  • Hi Suzanne,

    Please see my comment below:

    1. Yes, this is by design. Anytime the battery is removed, the Vreg settings will reset to default 4.2V because the IC has no idea what battery will be re-connected. There isn't a way to disable this feature.

    2. The latest fault will show first, and then when you read back the register, the other faults will show in order. By reading the fault bit, the fault condition will not clear but just show the next fault.

    3. I'm not sure if I understand this. If you are using our GUI to do the test, can you attach a screen shot for each condition? If there is a battery disconnected fault, you should always see fault in status too.

    4. The USB detection can take from 200ms to 800ms depending on different power sources.

    5. If watchdog timer is disabled, the IC will stay with whatever is programmed in I2C.

    6. Yes, once a write command is sent to the register through I2C, the device will stay in the host mode until a full power cycle.

    Please let me know if you have other questions.

    Thanks,

    Wenjia

  • Hi Wenjia,

    Thanks for the reply.

    For point #3, i have seen stat = charging in progress and fault = no battery when i read the register with a microcontroller. This is cannot be duplicated in eval kit as the read period is 1sec min. Is this possible? By design, does the chip will always show stat = fault when the fault != normal until the fault bits are read and cleared?

    for #4,  we are having difficulties is detecting a known DCP source even though we are plugging it into a adapter. Is it a must to do a force D+/D- if we are in host mode (I2C mode)?

    If we do not do this, what value will be read?

    Once the D+/D- is set, how long does it take for the IC to detect the port type? Can you list down the time taken for each input source?

    In the datatsheet under BC1.2 D+/D– DETECTION, it mention the following. What does it mean by next power port insertion?

    However, when the device is in host mode
    (that is, host is communicating via i2c to the device) writing a ‘1’ to register 0x04 bit location 4 (DPDM_EN)
    forces the device to perform a D+/D– detection on the next power port insertion

    Thanks

  • Hello Suzanne,

    Yes, the STAT will always show fault when there's a fault condition happen. There's one occasion that you may see STAT shows charging in progress but fault shows no battery or other fault conditions:  when the IC is recovered from a fault condition, the first time you read the resister, the STAT bit will immediately show that the fault is cleared so charging is resumed, however, the fault bit will still show the previous fault condition. If you read the resister again, the fault bit will be updated and show fault condition cleared.

    Whenever the USB or AC power is applied to the IC, a USB detection will automatically be initialized. After that, if in host mode, you want to force the USB detection again, you can write to DPDM_EN bit and USB_DET_1/2( bit0 and bit1 of register #3) will return the USB port type accordingly. I didn't find the "next power port insertion" on the datasheet, maybe we have different revisions but I hope the above will explain how this bit works.

    Below are the timing information for USB detection based on the tests that we've done. They are not specs but just a reference for you.

    - Power from 5V adapter, D+/D- shorted: ~200ms

    - Power from 5V adapter, D+/D- float: ~700ms

    - Power from 5V micro-USB, D+/D- shorted: ~200ms

    - Power from 5V micro-USB, D+/D- float: ~200ms

    Thanks,

    Wenjia

  • Hi Wenjia,

    Thanks for the explanation. I have 2 screenshots that show when the BQ is able to detect DCP and the fail detection.

    The First image is where the detecttion fails

    The second image is a pass detection

    Can you point out the critical region that determine the failure or success of the detection? According to the datasheet, the DP DM lines must be below 0.9v to be successful.

    Thanks

  • Hello Suzanne,

    When you say DCP detection failed, did the IC detect SDP or CDP? In the primary detection, the IC will detect if the port is SDP or one of DCP and CDP and if it detects DCP/CDP, it will continue to determine if it's DCP or CDP in the secondary detection.

    More specifically, during the primary detection, the IC will source a voltage on DP pin (VDP_SRC) and then compare the DM voltage with a reference VDAT_REF which is 0.4V maximum according to the BC 1.2 spec. If the DM voltage is above this reference, then the IC will detect DCP/CDP. Then during the secondary detection, the IC will source a voltage on DM pin instead (VDM_SRC) and compare the DP voltage with VDAT_REF. If DP voltage is close to DM voltage, then it is DCP as DM and DP should be shorted in DCP, while if DP voltage is close to zero, then it is detected as CDP.

    For bq24251, the VDP_SRC and VDM_SRC are both 0.6V.

    Thanks,

    Wenjia

  • Hi Wenjia,

    When I say fail detection, i meant instead of detecting a DCP; BQ is detecting SDP.

    Will the detection be affected by Hi-Z mode of the BQ IC? As what we have seen from the 1st image (fail detection) on the last post, the pulse is caused by enabling the Hi-Z mode of the BQ IC. Is this the expected behavior? However, i do not understand the different behavior from the 2 images. The 2 images are captured with the same firmware where the Hi-Z is enabled on initialization.We can see the pulse at a percentage of 60%

    As of now, by disabling Hi-Z, we can detect DCP or any other port type successfully and the signal waveform is different ( please see the attached imae). We would like to know if this is the root cause of the failure.  

    Thanks

  • Hi Suzanne,

    I tried this on the bq24251 EVM. When the DCP port is plugged in regularly, the DP and DM signals are shown below.

    When the DCP port is plugged in with HIZ enabled.

    You can see that if Hiz is enabled, the DM and DP remained to zero. As is described in my previous reply, when the IC is doing the primary detection, the voltage at DM is compared with a reference which is ~0.4V. If DM voltage is above the reference, the IC will detect DCP/CDP, unless it will be SDP. Therefore, as DM and DP are both close to zero in the above plot, the IC detects SDP instead. I'm not sure why your plots are different than mine, but my guess would be the voltage drop at the beginning of your fail detection plot is the reason for false detection.

    Thanks,

    Wenjia

  • Hi Wenjia,

    I have discovered that the BQ IC sets Bit 0 & Bit 1 in Register 3 to DCP after 50ms even though the power source is a Non Standard Adapter. However, after 1 sec, i can see that it detects as NSA. Is this normal?
  • Hi Suzanne,
    The detection takes as long as 700ms to finish, so please wait for at least this time to allow the IC to detect the right adapter.

    Thanks,
    Wenjia
  • Noted. Thanks