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BQ24253: BQ24253 - default state of Ilim during D+/D- detection

David McRell
Intellectual 445 points
Part Number: BQ24253

Hello!

For BQ24253, referencing datasheet SLUSBA1H.pdf, Table 1 - "EN1 and EN2 Truth Table", and Figure 18 - "bq24253 D+/D- and EN1/EN2" flow chart..

What is state of Input current limit (Ilim) before the D+/D- detection algorithm is done?  Is the Input Hi-Z?  I understand that EN1 and EN2 are ignored until "a change on the status of the EN1 and EN2 occur[s]".

Schematically, I'm planning to have pin Ilim shorted to GND (default 2A), but datasheet says Ilim pin is ignored for USB, so I expect this to not influence the above question.


Also, I'm planning to use /PG pin to pull EN2 low (EN1 has hardwired pull-up to LDO) to make "Externally programmed by ILIM (up to 2.0A)".  Is this an ok way to change ENx pin?  It seems 'yes' due to statement in ds, "The PG pin will remain high impedance until the detection has completed."

Thanks in advance!

David McRell

  • 0
    TI__Mastermind 25800 points

    Hey David,

    So before and during the D+/D- detection, there is a limit that you may see typically around 100mA. 

    As for pulling EN2 low with /PG low, I do not see an immediate issue with that plan, but I would caution you to make sure the timing of the D+/D- detection and the /PG low event not interfere with the detection of the EN2 pin state change. 

    I hope this helps!

    Regards,

    Joel H

  • 0 in reply to Joel Hernandez II
    Intellectual 445 points

    Thank you Joel.

    but I would caution you to make sure the timing of the D+/D- detection and the /PG low event not interfere with the detection of the EN2 pin state change.

    Where (when) in Figure 18 is EN1/EN2 initial state captured as the reference (not the change)?  IOW, in order to ask "EN1/EN2 change state?", EN1/EN2 initial state must first be established (latched) for the sake of the later comparison.  Does it happen before /PG is set, or after?

    Kind Regards,

    David McRell

    edit: typo fix

  • 0 in reply to David McRell
    Intellectual 445 points

    Hello,

    I need some help.

    1) does activating EN1/2 override BCv1.2?  If yes, then is it true that if EN1/2 never change state then BC v1.2 handshake is kept enforced?

    2) Should there be data exchanged on USB during BC v1.2 handshake?

    On my hw, at the moment, 3 different USB hosts (which I interpret to be qualified as SDP or CDP ports) will not charge the battery in any way (EN1/2 do not change state).  I do not see any data exchange (USB bus log) when a USB host (Mac/PC) is connect to BQ24253, rather I only see Reset Chirp K and target disconnects with time out error; /PG consistently goes low about 200ms after Vbus is connected.

    I've confirmed that a "dumb" iPad charger properly charges the battery with the same USB cable, in which /PG goes low about 600ms after Vbus is connected.

    solder, continuity, and shorts on D+/D- lines have been confirmed ok.

    classic question: what am I doing wrong?


    Kind Regards,

    David

    edit: changed "DCP" to "SDP".

  • 0 in reply to David McRell
    TI__Mastermind 25800 points

    Hey David,

    To your first question, you are correct, changing the state of EN1/EN2 AFTER the D+/D- input current detection completes will override the previous result. And also correct, if they never change state, then the result of the detection should remain the same. 

    2) I would not recommend data communication while the D+/D- detection is running. Let it complete before attempting to enumerate/communicate.

    In regards to your other comments, you mentioned used 3 qualified USB hosts. Are these from a USB Hub, a laptop, wall adapter? 

    Do you have a schematic of your hardware as well? 

    What battery voltage are you testing this with?

    Have you measured your system voltage when the battery is below ~3.5V?

    Regards,

    Joel H

  • 0 in reply to Joel Hernandez II
    Intellectual 445 points

    Hello Joel,

    Thank you very much for your reply!

    Thank you for confirming EN1/EN2 override.

    Note: I made a small edit to my post, possibly while you were writing your reply.  I changed "DCP" to "SDP".

    Are these from a USB Hub, a laptop, wall adapter?

    Two different Macminis, a Win7 desktop, and an iPhone 6s with Lightning CCK (USB-A adapter).  I've also tested with an Apple iPad charger, in which charging does work.

    I would not recommend data communication while the D+/D- detection is running.

    Agreed.  There is zero traffic.  However, should there be BC v1.2 communication during D+/D- detection?

    Do you have a schematic of your hardware as well?

    Gladly.  How can I send you schematic privately?

    What battery voltage are you testing this with?

    The battery's voltage is ~3.8V, i.e., it is not fully charged.

    Have you measured your system voltage when the battery is below ~3.5V?

    I have not, but not sure how such applies to the present problem.  If needed, can you please elaborate?

    Kind Regards,

    David McRell

  • 0 in reply to David McRell
    TI__Mastermind 25800 points
    Hey David,

    I sent you a personal message with my email. You can send me the schematic for your hardware to review.

    Have you also tested with a non-Apple wall charger?

    In regards to BC v1.2 communication, this charger does not support that during the detection.

    To your last question about the system voltage, when the part is in VSYSMIN regulation (i.e. the VBAT is below the VSYSMIN), we can narrow down whether there are any faults to the charger as this is the standalone version of the bq2425x family. We don't have I2C communication, so measuring VSYSMIN regulation is a alternative way to determine fault conditions, as listed in section 9.3.14.


    Regards,
    Joel H
  • 0 in reply to Joel Hernandez II
    Intellectual 445 points

    Hi Joel,

    schematic sent.

    non-Apple charger works. /PG goes low after ~800ms

    BC v1.2 communication: ok, so the algorithm is merely detecting D+/D- impedance changes?

    Regarding VSYSMIN, an interesting observation:
    Win7 desktop will now charge, but only when Vbat< 3.5V. If I charge long enough with "dumb" charger to make Vsys > 3.5V, charging via Win7 desktop (and Mac Mini) no longer works.

    I am reviewing section 9.3.14, but ATM I don't yet see how Vbat<3.5V applies.

    Kind Regards,
    David

    edit: typo, and clarification

  • 0 in reply to David McRell
    Intellectual 445 points
    I said:
    Win7 desktop will now charge, but only when Vbat< 3.5V.

    clarification: "will now charge" means /CHG pin is low (LED is on), but current is flowing out of the battery not in - I'm measuring about 280mA. It is as if 24253 is in battery supplement mode. SYS load is ~ 0.5x of 500mA, so my desktop (presumably a SDP) should be able to handle SYS load plus some charging.
  • 0 in reply to David McRell
    TI__Mastermind 25800 points
    Hey David,

    Yes, the BC1.2 comptatible algorithm is detecting impedances in the port connected, along with other timing events.

    And as I stated in the email I just sent, I believe because the ports are being detected as SDPs, and the because battery is above a certain threshold (~3.5-3.6V), the charger goes into a Hi-Z State, as noted by Figure 19 in the datasheet. This was in-line with the BC1.2 spec.

    The comment about section 9.3.14 was to help me see what the charger operation was at that moment. If the converter is not operating, the VSYS voltage will be voltage drop below the VBAT voltage (depending on load current and BATFET Rdson). If the converter is operating, then the converter regulates VSYS to a certain minimum (VSYSREG ~ 3.52V typical). A long regulating converter can help narrow down any faults in that table of section 9.3.14.

    As far as the charger showing charging but in reality, supplementing current, this phenomenon can also be explained by Figure 19. An SDP detection with the battery below ~3.5-3.6V, will set ILIM = 100mA for 45minutes.

    After looking at your schematic, you are saying that the current drawn from your converters, supply rail generator, and MCU is roughly 250mA?

    We may have to evaluate utilizing the external ILIM resistor , EN1/EN2, and VINDPM in lieu of the D+/D- if we verify that the SDP detection is the cause of the non-charging operation.


    I would suggest manually changing EN1/EN2 with each of those port types to verify that they will still charge. Also monitor the SW node waveform to determine if the converter is operating when the VBAT > 3.5V



    Regards,
    Joel H
  • 0 in reply to Joel Hernandez II
    Intellectual 445 points
    resolved over email. This was misunderstanding of mine mostly about SDP in BC v1.2 spec.

    Many thanks, Joel, for your meticulous analysis of my questions and measurements.

    Best Regards,
    David