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BQ25120A: power up with no load and no battery, what should happen?

ajayt
Genius 9555 points
Part Number: BQ25120A

With the reservation that this may be normal behaviour and that I may have misunderstood the documentation, what I am experiencing is the following:

 

As you probably already know the BQ25120A is a highly integrated charger. This is my schematic and I can provide PCB layout if you need it:

 

 

 

My intention was that while the device is powered from external power (via USB header P8), my circuit is powered from the integrated buck converter through header P5. I thought that this should be true whether the battery is connected or not connected i.e the buck converter will always be ON when external power is applied.

 

WITHOUT A BATTERY CONNECTED

 

What I am experiencing is that when external power is applied, without a load connected, the buck converter in 3 of the boards I made turns on and provides 1.8V and on the 4th board it provides ~700mV. The external power applied ranges from 4.9 to 5.1V. I tried both USB and stabilized power supply.

 

In this situation, if I connect the load (about 3mA @1.8V) the output at VSYS drops to about 300mV which implies that the buck converter has stopped. In all the boards if the load is connected before providing the external power, the output at VSYS after application of power is ~300mV.

 

WITH A BATTERY CONNECTED

 

When a battery is connected the output of the buck converter defaults to normal 1.8V as expected. Upon application of load the buck converter maintains normal regulation and the output remains at 1.8V. Upon application of external power nothing changes but the battery does not appear to charging.

 

Essentially what I would require is that I power the load from external power and charge the battery and as soon as external power is removed the charger switches to the battery.

ISET is connected to an 21K5 resistor which should provide about 9.8mA of charge current.

 

Looking in more detail in the datasheet, the battery must be connected before applying external power. I am still looking for a better description of what happens if the battery is not connected and one applies external power.

 

I am expecting the device to power up in default mode and it actually does (provided the battery is connected). I am going to configure it via the I2C port afterwards.

 

I am not using the MR pin. I left it floating since it is pulled internally to VBAT.

 

The problem that remains is that I don’t see 10mA flowing towards the battery to charge it although /CD is low and VIN>VUVLO.

 

Par9.3.21 states that: “For optimal operation and maximum power delivery allow VPMID>VSYS+0.7V”

 

My intention is to operate VSYS at 3V. I also intend to allow the battery to drop to about 3.3 to 3.4V. This means that VPMID=3.3V to 3.4V. Do you think this will be a problem?

 

  

  • 0 in reply to ajayt
    TI__Genius 12475 points
    Ajay,

    The schematic is not showing correctly. could you please repost? I see that your question is referencing the schematics.

    thanks,
    gautham
  • 0 in reply to Gautham
    Prodigy 95 points
    Hello Gautham,

    I was the originator of the problem. and ajayt was helping me out.

    We solved it and it is no issue anymore but the last question still remains:

    Datasheet Par9.3.21 states that: “For optimal operation and maximum power delivery allow VPMID>VSYS+0.7V”

    My intention is to operate VSYS at 3V. I also intend to allow the battery to drop to about 3.3 to 3.4V. This means that VPMID=3.3V to 3.4V. Do you think this will be a problem?

    Any comment on this?

    Thank you.
  • 0 in reply to sebastian
    TI__Genius 12475 points

    Sebastian,

    Yes you will violate the headroom for the VSYS as the VSYS doesn't have a bypass feature. I would expected increased ripple in this condition. What is the tolerance on the VSYS 3V? Do you have a way to lower the VSYS in lower battery conditions by a few 100mV?

    regards,

    gautham

  • 0 in reply to Gautham
    Prodigy 95 points

    Hello Gautham,

    Thanks for coming back so quick. Sorry for my late reply but I was looking into the matter.

    Unfortunately, the tolerance on VSYS 3V is very tight as it will affect other aspects of the system. One suggestion is that we operate the battery down to 3.5V so that we have another 100mV of headroom (0.5V total). 

    I have experimented with my prototype using the BQ25120A and found that ripple becomes excessive only at about VSYS = VPMID - 0.35V. I measured about 100mV pkp ripple at this level. Where does the 0.7V come from exactly? Is there a formula to calculate ripple vs Vinput?

    Any other suggestions are welcome.

    Also just as a note when you update the datasheet, this requirement is only a single senctence somewhere in the buck converter paragraph. I think it must be stressed and shown in the parameters table under the buck converter. I noticed it far later into the design.

  • 0 in reply to sebastian
    TI__Genius 12475 points

    Sebastian,

    Thanks for the suggestion. I will make a note more visible on the datasheet. 

    I would recommend consider operating a little lower around 2.7V if that's possible. In my lab testing across 10+ devices i saw around 300mV is when we get into the actual ripple being worsened. The threshold itself is guardbanded across process/ temperature and variation so you can expect to see better performance on the actual device itself. 

    I would also recommend looking at effective capacity being lost at 3.5V and below. 

    Regards,

    Gautham

  • 0 in reply to Gautham
    Prodigy 95 points
    Thank you very much for your answers Gautham.