bq294582 having a customer test mode.
Appling more than 10V on VDD over VC3 brings the IC into CTM.
The Datasheet (page 8) desribes the delay timer is reduced to about 10ms.
But in the diagram (page 9) you see that the output is set to high, without any overvoltage event on VC3.
Is the overvoltage protection disabled in CTM?
If yes, why?
What can be tested in this mode?
How this mechanism works ?
The revised datasheet is in the process of being modified to add a waveform showing when the timer starts based on VC3 exceeding OVP threshold and while Vdd - VC3 > 10V.
The datasheet will be available on line in a approx 1-2 weeks