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bq27520-G4 / exit ROM mode

K.Yaita
Guru 29690 points
Other Parts Discussed in Thread: BQ27520-G4, BQ27520EVM

Hi TI members,

My customer said sometimes write failure was occured when he writes DFFS file data to bq27520-G4.
It seems bq27520-G4 was still in the state of "ROM mode" in this case.

He added the following "Exit ROM mode procedure" when the write failure was occured, then he achieved to exit "ROM mode".
--------------------------------
W: 16 00 0F
W: 16 64 0F 00
--------------------------------

However he repeated above rewrite sequence several times, bq27520 eventually forces SCL low level as the following and doesn't release SCL until powering off.
Once it occures, bq27520 inevitably forces SCL low level again in next rewrite sequence although after powering cycles...
In other words, I2C master can't access bq27520 (address 0x55) from then on.
.


Do you have same experience with bq27520-G4?
Is there any workaround?

Best Regards,
Yaita / Japan disty 

  • 0
    Guru 29690 points

    Hi TI members,

    I found out the device forces SCL low level is still in ROM mode...
    I wrote Data memory directly except "Exit ROM mode procedure", then I found the device recovers to normal behavior.
    It seems something wrong is occured in re-write process and the device went abnormal state in this case.
    Please regard the issue closed.

    I would like to ask an additional question..
    It seems bq27520 has a state of ROM mode that "Exit ROM mode" can't be effective like this case.
    Do you have same experience with bq27520-G4?

    Best Regards,
    Yaita

  • 0
    TI__Guru* 76230 points
    Hi Yaita,

    Your comm lines has way too much capacitance, your signals are not clean square waves. Try to reduce the capacitance on the line . You might want to explore reducing the i2c frequency to a slower value.

    thanks
    Onyx
  • 0 in reply to Onyx Ahiakwo
    Guru 29690 points

    Hi Onyx-san,

    Thank you for your advice.
    I will talk to my customer about it.

    Best Regards,
    Yaita

  • 0 in reply to K.Yaita
    Guru 29690 points

    Hi Onyx-san,

    I would like to ask the following.
    Is the following 300ns(max) for tr / tf defined from VIL_max(0.6V) to VIH_min(1.2V)?



    Best Regards,
    Yaita / Japan disty

  • 0 in reply to K.Yaita
    Guru 29690 points

    May I have your comments?

    Best Regards,
    Yaita

  • 0 in reply to K.Yaita
    TI__Guru* 76230 points

    Hi yaita,

    300ns is the max time required from 10% of the signal to 90% of same signal, so irrespective of what ever voltages your high and low are, as long as they are within thresholds stipulated in the data sheet, you should be ok.

    thanks

    Onyx

  • 0 in reply to Onyx Ahiakwo
    Guru 29690 points

    Hi Onyx-san,

    I evaluated bq27520EVM and found SCL rise time (10% - 90%) was 3.78us that considerably exceeds 300ns(MAX).
    I used EV2300 for I2C generator under the following connection.
    "note PC" - "EV2300" - "bq27520EVM" - "Li-ion battery"


    There is no ploblem in terms of bq27520EVM operation with EV2300.
    So, I think tr=tf=300ns(MAX) is very strict specification.
    Should my customer follow 300ns(Max) strictly?

    Best Regards,
    Yaita / Japan disty