What level should I provide for CHGST?

If a logic level is used, 3.3V would be a good value for a high. Note that with the low minimum for VCHG_DET1, the logic will have to provide a very good "low" level.  A standard maximum high logic "low" may not be good enough.  The CHGST input has a tolerance for applied voltage up to the BAT pin value as described in the absolute maximum table and notes.

Typically if a logic signal is not used, the CHGST signal might be provided by a voltage divider from the BAT pin or PACK pin.  The voltage divider ratio would provide a voltage above VCHG_DET1 at the lowest allowed pack value and provide a voltage with some margin below the BAT absolute maximum under all conditions.  A more complex circuit may be needed in some cases.

What pulse width should I provide for CHGST?

Typically CHGST is expected to be a DC signal.  It would go high when the pack is connected to the charger and go low when removed. 

The response time of the analog input will vary with voltage. A voltage just above the VCHG_DET1threshold may cause a slower response than a 3.3V level. Additionally, the evaluation of the voltages at start-up may vary with voltage.  CHGST does several things and may need to last various lengths depending on the state of the part.

  1. It starts up the regulator.  If the pulse is too short, the VREG voltage will fall.
  2. If it persists sufficiently, the logic latches the state of the VREG.
  3. It starts the protection system after the regulator is latched on and stable.

Suggestions:

  • For a typical multi-terminal pack in system, provide CHGST as a DC signal
  • For circuit implementations where a DC signal is not present, provide CHGST until the FETs close
  • For board test or other circuits, start with a 200ms pulse and optimize the pulse duration for your situation.  Remember that CHGST should be held high during programming.