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UCD3138: External Sync working with DPWM0 is not good well

I give a 200KHZ signal to pin 8(SYNC), and configure dpwm0 synchronized to it, but there is no dpwm output at all. My Demo is UCD3138HPFBVEM_029 , the chip is of the 40 pin QFN, what's the problem?
My codes are as follows:

#define SWITCHING_FREQUENCY (200)
#define HALF_PERIOD ((int)((1000000/SWITCHING_FREQUENCY)/8)) //half period in 4 nanosecond steps.
#define PERIOD (HALF_PERIOD * 2) //define half period first, so period is guaranteed to be double half period.
#define PERIOD_HIGH_RES (PERIOD * 16)

void init_dpwm_0(void)
{
MiscAnalogRegs.GLBIOEN.bit.ADC_EXT_TRIG_IO_EN = 0;//SPECIAL FUNCTION
MiscAnalogRegs.IOMUX.bit.SYNC_MUX_SEL = 2; //
MiscAnalogRegs.IOMUX.bit.JTAG_CLK_MUX_SEL = 0; //default is 2
MiscAnalogRegs.IOMUX.bit.EXT_TRIG_MUX_SEL = 2; //SYNC
LoopMuxRegs.SYNCCTRL.bit.SYNC_DIR = 1; 

Dpwm0Regs.DPWMCTRL0.bit.PWM_EN = 0;
Dpwm0Regs.DPWMPRD.all = PERIOD_HIGH_RES;

Dpwm0Regs.DPWMEV1.all = 0;
Dpwm0Regs.DPWMEV2.all = PERIOD_HIGH_RES/8; 


Dpwm0Regs.DPWMEV3.all = Dpwm0Regs.DPWMEV2.all-(PERIOD_HIGH_RES/32);
Dpwm0Regs.DPWMEV4.all = Dpwm0Regs.DPWMEV3.all +(PERIOD_HIGH_RES/8) ; 

Dpwm0Regs.DPWMCTRL0.bit.CLA_EN = 0; 
Dpwm0Regs.DPWMCTRL2.bit.SAMPLE_TRIG_1_EN = 1; 
Dpwm0Regs.DPWMCTRL1.bit.EXT_SYNC_EN=1;
Dpwm0Regs.DPWMCTRL1.bit.EVENT_UP_SEL = 0; 


Dpwm0Regs.DPWMCTRL0.bit.PWM_MODE = 0;

Dpwm0Regs.DPWMINT.bit.PRD_INT_EN = 1;
Dpwm0Regs.DPWMINT.bit.PRD_INT_SCALE = 0;

Dpwm0Regs.DPWMCTRL0.bit.PWM_EN = 1;


}
void init_gpio(void)
{
MiscAnalogRegs.IOMUX.bit.JTAG_DATA_MUX_SEL = 1; // Accommodate TDO/TDI pins for RXD/TXD use
MiscAnalogRegs.IOMUX.bit.UART_MUX_SEL = 0;
MiscAnalogRegs.GLBIOVAL.bit.FAULT2_IO_VALUE = 0; //debug state

// Set outputs to 0.
MiscAnalogRegs.GLBIOVAL.all = 0;
// 1 - Output, 0 - Input
MiscAnalogRegs.GLBIOOE.all = MASK_PGOOD | MASK_FAILURE | MASK_VINOK |
DPWM0A_GLBIO_BIT_MASK | DPWM0B_GLBIO_BIT_MASK |
DPWM1A_GLBIO_BIT_MASK | DPWM1B_GLBIO_BIT_MASK | 
DPWM2A_GLBIO_BIT_MASK | DPWM2B_GLBIO_BIT_MASK | 
DPWM3A_GLBIO_BIT_MASK | DPWM3B_GLBIO_BIT_MASK ;// MASK_VINOK |

MiscAnalogRegs.GLBIOEN.all = MASK_PGOOD | MASK_FAILURE | MASK_VINOK |
CONTROL_GLBIO_BIT_MASK;//0 = Input
}
void gpio_dpwm_on(void)
{
MiscAnalogRegs.GLBIOEN.all &= ~((Uint32)(DPWM0A_GLBIO_BIT_MASK | DPWM0B_GLBIO_BIT_MASK|
DPWM1A_GLBIO_BIT_MASK | DPWM1B_GLBIO_BIT_MASK|
DPWM2A_GLBIO_BIT_MASK | DPWM2B_GLBIO_BIT_MASK|
DPWM3A_GLBIO_BIT_MASK | DPWM3B_GLBIO_BIT_MASK));
}

void main()
{

volatile unsigned int dummy;
if(GioRegs.FAULTIN.bit.FLT2_IN == 1)// Re-Check pin assignment (ADC_EXT/SYNC may be?)
{
clear_integrity_word();
}
init_gpio();
gpio_dpwm_on();
init_dpwm_0();
for(;;)
{
if (erase_segment_counter > 0)
{
erase_task(); // Handle the DFlash segment erases
}
pmbus_handler();
}
}