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UCD3138: what is the result of enabling a comparator interrupt?

Part Number: UCD3138

Hello,

it might be a very simple question, but I can't find the answer.

I have FAULT_MUX interrupts set as FIQ.

I have AcompB set for threshold and polarity, but ACOMP_B_INT_EN is set to 0

The fast interrupt routine happens when the voltage on the comp B pin is above the threshold. How does this happen if the interrupt is disabled? I have also verified on memory debugger that ACOMP_B_INT_EN is not set.

Are all fault interrups enabled globally somewhere in the code (this is a modified version of the EVM code)? 

What is the purpose of ACOMP_B_INT_EN if the interrupt is triggered anyway?

Thank you

  • Marco, is it possible that you are also routing the ACOMP_B signal through to the DPWM and using that interrupt to do the FIQ as well.

    In fact, we recommend that you do it that way if the DPWM is being turned off as well. It's possible for the fault to turn off the DPWM and have it be missed by the Fault Mux interrupt. It is very rare, but it has happened. So far as I know, the ACOMP_B_INT_EN will enable and disable the interrupt properly.
  • Thank you Ian. You are right, that is what is happening.
    Are you suggesting to use DPWMINT (FLT_B_INT_EN for example) instead of the comparator interrupt?

    Also, since we are talking about it, when the comparator triggers the fault in DPWM module, this shuts down, but when the "fault" clears, the DPWM doesn't restart, unless it is handled in the interrupt.
    This is my understanding of it: if NO interrupt is enabled, the comparator still triggers the DPWM to shut down, but when the comparator goes back to its original state (fault cleared), DPWM still does NOT restart, and the only way to handle this would be to have the interrupt enabled and restart DPWM there?

    (should I move the above to a new thread?)

    Thank you
  • Yes, we suggest using the DPWMINT. To restart the DPWM after a fault trigger, you need to disable and reenable the DPWM. If you are using the Period interrupt in the DPWM, make sure you disable the period interrupt before disabling the DPWM. Otherwise the period interrupt gets locked on.

    This restriction only applies on the non-a version devices. On the A version devices, there is a new bit - FLT_RESTART - in DPWMFLTCTRL.
    This will clear the fault based lock of the DPWM. The big advantage it has is that if you have only one of the pins shut off, it will restart it without making it necessary to shut off the other pin as well. You can see documentation of this in the UCD3138A Migration Guide.
  • thank you Ian. I am using FLT_RESTART now and I see no obvious difference in setting it or not.

    case 1
    - FLT_RESTART = 1. Fault happens, DPWMB off. Fault clears, nothing happens. I set FLT_RESTART = 0 and pwm restarts. Then I need to reset FLT_RESTART to 1.

    case 2
    - FLT_RESTART = 0. Fault happens, dpwmB off. Fault clears, nothing happens. I set FLT_RESTART =1, then =0 and pwm restarts. Then I need to reset FLT_RESTART to 1.

    The only difference is I have to do one extra toggle? Is the behavior correct? so dpwm does not restart automatically anyway?

    I see the benefit of not having to reset the entire dpwm module (in my case I am using only dpwmB, so no difference actually)

    From the migration guide, "Setting this bit will restart DPWM B after a fault without stopping DPWM A. [...] Note that FLT_RESTART does not reset itself. When using it, it is necessary to return it to zero after each use so that there will be a rising edge to trigger the next estart."
    From the above sentences, I understand that the first fault/clear will disable and re-enable pwm, but if I want to work also for additional faults, I need to reset that bit. Is this correct? Actually I see that until I return it to zero, there is no action at all

    To what "rising edge" is this referring to?

    Thank you
    Marco